From: hjc Date: Thu, 27 Mar 2014 08:08:56 +0000 (+0800) Subject: rk3288 lcdc: add global alpha X-Git-Tag: firefly_0821_release~5778 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=57c92b59db7852b3c17960147c58649f069e70db;p=firefly-linux-kernel-4.4.55.git rk3288 lcdc: add global alpha --- diff --git a/drivers/video/rockchip/lcdc/rk3288_lcdc.c b/drivers/video/rockchip/lcdc/rk3288_lcdc.c index 2365706cf627..06a719294ca8 100755 --- a/drivers/video/rockchip/lcdc/rk3288_lcdc.c +++ b/drivers/video/rockchip/lcdc/rk3288_lcdc.c @@ -226,12 +226,10 @@ static int rk3288_lcdc_pre_init(struct rk_lcdc_driver *dev_drv) } else { lcdc_dev->clk_on = 1; } - /*rk3288_lcdc_read_reg_defalut_cfg(lcdc_dev);*/ for (i = 0; i <= (0x200 >> 4); i++) { for (j = 0; j < 4; j++) readl_relaxed(cbase + i * 4 + j); - } #ifndef CONFIG_RK_FPGA if (lcdc_dev->pwr18 == true) { @@ -2221,10 +2219,10 @@ static ssize_t rk3288_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv, spin_lock(&lcdc_dev->reg_lock); if (lcdc_dev->clk_on) { zorder = lcdc_readl(lcdc_dev, DSP_CTRL1); - layer0_sel = zorder & m_DSP_LAYER0_SEL; - layer1_sel = zorder & m_DSP_LAYER1_SEL; - layer2_sel = zorder & m_DSP_LAYER2_SEL; - layer3_sel = zorder & m_DSP_LAYER3_SEL; + layer0_sel = (zorder & m_DSP_LAYER0_SEL)>>8; + layer1_sel = (zorder & m_DSP_LAYER1_SEL)>>10; + layer2_sel = (zorder & m_DSP_LAYER2_SEL)>>12; + layer3_sel = (zorder & m_DSP_LAYER3_SEL)>>14; /*WIN0*/ win_ctrl = lcdc_readl(lcdc_dev, WIN0_CTRL0); w0_state = win_ctrl & m_WIN0_EN; @@ -2361,7 +2359,7 @@ static ssize_t rk3288_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv, w2_0_dsp_x = (dsp_info & m_WIN2_DSP_WIDTH0)+1; w2_0_dsp_y = ((dsp_info & m_WIN2_DSP_HEIGHT0)>>16)+1; w2_0_st_x = dsp_st & m_WIN2_DSP_XST0; - w2_0_st_y = (dsp_st & m_WIN2_DSP_YST0); + w2_0_st_y = (dsp_st & m_WIN2_DSP_YST0)>>16; dsp_info = lcdc_readl(lcdc_dev,WIN2_DSP_INFO1); dsp_st = lcdc_readl(lcdc_dev,WIN2_DSP_ST1); @@ -2470,105 +2468,105 @@ static ssize_t rk3288_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv, " fmt:%s, " " y_vir:%d, " " uv_vir:%d\n" - " xact:%d, " - " yact:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d\n" - " y_h_fac:%d, " - " y_v_fac:%d, " - " uv_h_fac:%d, " - " uv_v_fac:%d, " - " y_addr: 0x%x, " - " uv_addr:0x%x\n" + " xact:%4d, " + " yact:%4d, " + " dsp_x:%4d, " + " dsp_y:%4d, " + " x_st:%4d, " + " y_st:%4d\n" + " y_h_fac:%8d, " + " y_v_fac:%8d, " + " uv_h_fac:%8d, " + " uv_v_fac:%8d\n" + " y_addr: 0x%08x, " + " uv_addr:0x%08x\n" "win1:\n" " state:%d, " " fmt:%s, " " y_vir:%d, " " uv_vir:%d\n" - " xact:%d, " - " yact:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d\n" - " y_h_fac:%d, " - " y_v_fac:%d, " - " uv_h_fac:%d, " - " uv_v_fac:%d, " - " y_addr: 0x%x, " - " uv_addr:0x%x\n" + " xact:%4d, " + " yact:%4d, " + " dsp_x:%4d, " + " dsp_y:%4d, " + " x_st:%4d, " + " y_st:%4d\n" + " y_h_fac:%8d, " + " y_v_fac:%8d, " + " uv_h_fac:%8d, " + " uv_v_fac:%8d\n" + " y_addr: 0x%08x, " + " uv_addr:0x%08x\n" "win2:\n" " state:%d\n" " fmt:%s\n" " area0:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" " area1:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" " area2:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" " area3:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" "win3:\n" " state:%d\n" " fmt:%s\n" " area0:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" " area1:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d " + " addr:0x%08x\n" " area2:\n" - " addr:0x%x, " - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n" + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n" " area3:\n" - " state:%d, " - " y_vir:%d, " - " dsp_x:%d, " - " dsp_y:%d, " - " x_st:%d, " - " y_st:%d, " - " addr:0x%x\n", + " state:%d," + " y_vir:%4d," + " dsp_x:%4d," + " dsp_y:%4d," + " x_st:%4d," + " y_st:%4d," + " addr:0x%08x\n", h_pw_bp,v_pw_bp, layer3_sel,layer2_sel,layer1_sel,layer0_sel, w0_state,format_w0,w0_vir_y,w0_vir_uv,w0_act_x,w0_act_y, diff --git a/drivers/video/rockchip/lcdc/rk3288_lcdc.h b/drivers/video/rockchip/lcdc/rk3288_lcdc.h index 6c549dc91d9d..4ca889f258eb 100755 --- a/drivers/video/rockchip/lcdc/rk3288_lcdc.h +++ b/drivers/video/rockchip/lcdc/rk3288_lcdc.h @@ -127,7 +127,7 @@ #define m_DSP_LAYER0_SEL (3<<8) #define m_DSP_LAYER1_SEL (3<<10) #define m_DSP_LAYER2_SEL (3<<12) -#define m_DSP_LAYER3_SEL (3<<16) +#define m_DSP_LAYER3_SEL (3<<14) #define DSP_BG (0x0018) #define v_DSP_BG_BLUE(x) (((x<<2)&0x3ff)<<0) diff --git a/drivers/video/rockchip/rk_fb.c b/drivers/video/rockchip/rk_fb.c index 269b2a8fd967..ccc8f56945d2 100755 --- a/drivers/video/rockchip/rk_fb.c +++ b/drivers/video/rockchip/rk_fb.c @@ -1345,6 +1345,8 @@ static int rk_fb_set_win_buffer(struct fb_info *info, ppixel_a = ((fb_data_fmt == ARGB888)||(fb_data_fmt == ABGR888)) ? 1:0; global_a = (win_par->g_alpha_val == 0) ? 0:1; reg_win_data->alpha_en = ppixel_a | global_a; + reg_win_data->g_alpha_val = win_par->g_alpha_val; + reg_win_data->alpha_mode = win_par->alpha_mode; if(reg_win_data->reg_area_data[0].smem_start > 0){ reg_win_data->z_order = win_par->z_order; reg_win_data->win_id = win_par->win_id; @@ -2087,7 +2089,6 @@ if (rk_fb->disp_mode != DUAL) { win->alpha_mode = 4;//AB_SRC_OVER; win->alpha_en = ((win->format == ARGB888)||(win->format == ABGR888)) ? 1 : 0; win->g_alpha_val = 0; - printk("%s,alpha_mode=%d,alpha_en=%d\n",__func__,win->alpha_mode,win->alpha_en); if (rk_fb->disp_mode == DUAL) { if (extend_win->state && (hdmi_switch_complete)) {