From: yxj <yxj@rock-chips.com>
Date: Tue, 14 Aug 2012 09:47:29 +0000 (+0800)
Subject: rk30 lcdc:delay before wirite lut data,the reg modify  only update at the start of... 
X-Git-Tag: firefly_0821_release~8807
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=58a1ab27702b9d98cedb7ba16b9f84d28c81a646;p=firefly-linux-kernel-4.4.55.git

rk30 lcdc:delay before wirite lut data,the reg modify  only update at the start of every frame after set cfg_done reg
---

diff --git a/drivers/video/rockchip/chips/rk30_lcdc.c b/drivers/video/rockchip/chips/rk30_lcdc.c
index b49d0ccd06e9..14cbe2cff7ba 100644
--- a/drivers/video/rockchip/chips/rk30_lcdc.c
+++ b/drivers/video/rockchip/chips/rk30_lcdc.c
@@ -904,7 +904,8 @@ static int rk30_set_dsp_lut(struct rk_lcdc_device_driver *dev_drv,int *lut)
 
 	struct rk30_lcdc_device *lcdc_dev = container_of(dev_drv,struct rk30_lcdc_device,driver);
 	LcdMskReg(lcdc_dev,SYS_CTRL1,m_DSP_LUT_RAM_EN,v_DSP_LUT_RAM_EN(0));
-	LCDC_REG_CFG_DONE();  
+	LCDC_REG_CFG_DONE();
+	msleep(25);
 	for(i=0;i<256;i++)
 	{
 		v = lut[i];