From: Chris Lattner Date: Wed, 25 Feb 2004 02:56:58 +0000 (+0000) Subject: Implement special case for storing an immediate into memory so that we don't need X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=5a83096d6a405816e9729b07d557b757d8fb725f;p=oota-llvm.git Implement special case for storing an immediate into memory so that we don't need an intermediate register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11816 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 4ebffeb81be..b19ba556446 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1907,24 +1907,40 @@ void ISel::visitLoadInst(LoadInst &I) { /// instruction. /// void ISel::visitStoreInst(StoreInst &I) { - unsigned ValReg = getReg(I.getOperand(0)); unsigned AddressReg = getReg(I.getOperand(1)); - const Type *ValTy = I.getOperand(0)->getType(); unsigned Class = getClassB(ValTy); - if (Class == cLong) { - addDirectMem(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg).addReg(ValReg); - addRegOffset(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg,4).addReg(ValReg+1); - return; + if (ConstantInt *CI = dyn_cast(I.getOperand(0))) { + uint64_t Val = CI->getRawValue(); + if (Class == cLong) { + addDirectMem(BuildMI(BB, X86::MOVmi32, 5), AddressReg).addZImm(Val & ~0U); + addRegOffset(BuildMI(BB, X86::MOVmi32, 5), AddressReg,4).addZImm(Val>>32); + } else { + static const unsigned Opcodes[] = { + X86::MOVmi8, X86::MOVmi16, X86::MOVmi32 + }; + unsigned Opcode = Opcodes[Class]; + addDirectMem(BuildMI(BB, Opcode, 5), AddressReg).addZImm(Val); + } + } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { + addDirectMem(BuildMI(BB, X86::MOVmi8, 5), + AddressReg).addZImm(CB->getValue()); + } else { + if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addDirectMem(BuildMI(BB, X86::MOVmr32, 5), AddressReg).addReg(ValReg); + addRegOffset(BuildMI(BB, X86::MOVmr32, 5), AddressReg,4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; + addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); + } } - - static const unsigned Opcodes[] = { - X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; - addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); } diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 4ebffeb81be..b19ba556446 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -1907,24 +1907,40 @@ void ISel::visitLoadInst(LoadInst &I) { /// instruction. /// void ISel::visitStoreInst(StoreInst &I) { - unsigned ValReg = getReg(I.getOperand(0)); unsigned AddressReg = getReg(I.getOperand(1)); - const Type *ValTy = I.getOperand(0)->getType(); unsigned Class = getClassB(ValTy); - if (Class == cLong) { - addDirectMem(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg).addReg(ValReg); - addRegOffset(BuildMI(BB, X86::MOVmr32, 1+4), AddressReg,4).addReg(ValReg+1); - return; + if (ConstantInt *CI = dyn_cast(I.getOperand(0))) { + uint64_t Val = CI->getRawValue(); + if (Class == cLong) { + addDirectMem(BuildMI(BB, X86::MOVmi32, 5), AddressReg).addZImm(Val & ~0U); + addRegOffset(BuildMI(BB, X86::MOVmi32, 5), AddressReg,4).addZImm(Val>>32); + } else { + static const unsigned Opcodes[] = { + X86::MOVmi8, X86::MOVmi16, X86::MOVmi32 + }; + unsigned Opcode = Opcodes[Class]; + addDirectMem(BuildMI(BB, Opcode, 5), AddressReg).addZImm(Val); + } + } else if (ConstantBool *CB = dyn_cast(I.getOperand(0))) { + addDirectMem(BuildMI(BB, X86::MOVmi8, 5), + AddressReg).addZImm(CB->getValue()); + } else { + if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addDirectMem(BuildMI(BB, X86::MOVmr32, 5), AddressReg).addReg(ValReg); + addRegOffset(BuildMI(BB, X86::MOVmr32, 5), AddressReg,4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; + addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); + } } - - static const unsigned Opcodes[] = { - X86::MOVmr8, X86::MOVmr16, X86::MOVmr32, X86::FSTr32 - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FSTr64; - addDirectMem(BuildMI(BB, Opcode, 1+4), AddressReg).addReg(ValReg); }