From: Eli Friedman <eli.friedman@gmail.com>
Date: Sun, 23 Aug 2009 00:14:19 +0000 (+0000)
Subject: Add check for completeness.  Note that this doesn't actually have any
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=5aba5c0e882fca505e3e0fc784c37a85babb872e;p=oota-llvm.git

Add check for completeness.  Note that this doesn't actually have any
effect with the way the current code is structured.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79792 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4138e98f18e..301c7b35c3d 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3460,7 +3460,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) {
 
   unsigned EVTBits = ExtVT.getSizeInBits();
   unsigned ShAmt = 0;
-  if (N0.getOpcode() == ISD::SRL && N0.hasOneUse()) {
+  if (N0.getOpcode() == ISD::SRL && N0.hasOneUse() && ExtVT.isRound()) {
     if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
       ShAmt = N01->getZExtValue();
       // Is the shift amount a multiple of size of VT?