From: Craig Topper Date: Fri, 17 Jan 2014 08:01:20 +0000 (+0000) Subject: Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correctly... X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=5f69be67b5ec7619186f8891ac53d48ead29728e;p=oota-llvm.git Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correctly in 16-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199478 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 8cf08ad75f2..3fdb42f6c28 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -7487,9 +7487,9 @@ let Constraints = "$src1 = $dst" in { def CRC32r32r16 : SS42I_crc32r<0xF1, "crc32{w}", GR32, GR16, int_x86_sse42_crc32_32_16>, OpSize; def CRC32r32m32 : SS42I_crc32m<0xF1, "crc32{l}", GR32, i32mem, - int_x86_sse42_crc32_32_32>; + int_x86_sse42_crc32_32_32>, OpSize16; def CRC32r32r32 : SS42I_crc32r<0xF1, "crc32{l}", GR32, GR32, - int_x86_sse42_crc32_32_32>; + int_x86_sse42_crc32_32_32>, OpSize16; def CRC32r64m64 : SS42I_crc32m<0xF1, "crc32{q}", GR64, i64mem, int_x86_sse42_crc32_64_64>, REX_W; def CRC32r64r64 : SS42I_crc32r<0xF1, "crc32{q}", GR64, GR64,