From: Alexey Dobriyan Date: Fri, 6 Jun 2014 21:36:41 +0000 (-0700) Subject: Documentation/memory-barriers.txt: fix important typo re memory barriers X-Git-Tag: firefly_0821_release~176^2~3820^2~4^2~104 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=615cc2c9cf95;p=firefly-linux-kernel-4.4.55.git Documentation/memory-barriers.txt: fix important typo re memory barriers Examples introducing neccesity of RMB+WMP pair reads as A=3 READ B www rrrrrr B=4 READ A Note the opposite order of reads vs writes. But the first example without barriers reads as A=3 READ A B=4 READ B There are 4 outcomes in the first example. But if someone new to the concept tries to insert barriers like this: A=3 READ A www rrrrrr B=4 READ B he will still get all 4 possible outcomes, because "READ A" is first. All this can be utterly confusing because barrier pair seems to be superfluous. In short, fixup first example to match latter examples with barriers. Signed-off-by: Alexey Dobriyan Cc: David Howells Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 46412bded104..f1dc4a215593 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -115,8 +115,8 @@ For example, consider the following sequence of events: CPU 1 CPU 2 =============== =============== { A == 1; B == 2 } - A = 3; x = A; - B = 4; y = B; + A = 3; x = B; + B = 4; y = A; The set of accesses as seen by the memory system in the middle can be arranged in 24 different combinations: