From: Evan Cheng Date: Tue, 27 Feb 2007 21:06:57 +0000 (+0000) Subject: Pass IsImp, IsKill, and IsDead to ChangeToRegister. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=659ba970e3d64465cfa1abc4d7d3f9595b5b0878;p=oota-llvm.git Pass IsImp, IsKill, and IsDead to ChangeToRegister. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34688 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index ef06d97ea92..3351aa80210 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -280,13 +280,14 @@ public: /// ChangeToRegister - Replace this operand with a new register operand of /// the specified value. If an operand is known to be an register already, /// the setReg method should be used. - void ChangeToRegister(unsigned Reg, bool isDef) { + void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false, + bool isKill = false, bool isDead = false) { opType = MO_Register; contents.RegNo = Reg; IsDef = isDef; - IsImp = false; - IsKill = false; - IsDead = false; + IsImp = isImp; + IsKill = isKill; + IsDead = isDead; } friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {