From: Preston Gurd Date: Tue, 1 May 2012 19:50:22 +0000 (+0000) Subject: This patch marks the X86 floating point stack registers ST0-ST7 as reserved X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=66413b61f0fee8f8177aeadb27d16e8eb7d30472;p=oota-llvm.git This patch marks the X86 floating point stack registers ST0-ST7 as reserved in order to avoid assertion failures in the register scavenger. The assertion failures were “Bad machine code: Using an undefined physical register” and “Bad machine code: MBB exits via unconditional fall-through but its successor differs from its CFG successor!”. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155930 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 6e00a552b60..402c54cadca 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -299,6 +299,16 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { Reserved.set(X86::FS); Reserved.set(X86::GS); + // Mark the floating point stack registers as reserved. + Reserved.set(X86::ST0); + Reserved.set(X86::ST1); + Reserved.set(X86::ST2); + Reserved.set(X86::ST3); + Reserved.set(X86::ST4); + Reserved.set(X86::ST5); + Reserved.set(X86::ST6); + Reserved.set(X86::ST7); + // Reserve the registers that only exist in 64-bit mode. if (!Is64Bit) { // These 8-bit registers are part of the x86-64 extension even though their