From: Gary King <gking@nvidia.com>
Date: Wed, 15 Sep 2010 16:55:30 +0000 (-0700)
Subject: [ARM] tegra: mirror inner-cacheable change in tegra startup
X-Git-Tag: firefly_0821_release~9833^2~163^2~8
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=70d8295c1fad90555c3c7f00e881481451d17a60;p=firefly-linux-kernel-4.4.55.git

[ARM] tegra: mirror inner-cacheable change in tegra startup

Change-Id: Ibe2662934076a28a6ce22ffc5eb0bfaa46f98ccd
Signed-off-by: Gary King <gking@nvidia.com>
---

diff --git a/arch/arm/mach-tegra/cortex-a9.S b/arch/arm/mach-tegra/cortex-a9.S
index 893544956832..91d787f2adcb 100644
--- a/arch/arm/mach-tegra/cortex-a9.S
+++ b/arch/arm/mach-tegra/cortex-a9.S
@@ -665,11 +665,11 @@ ENTRY(__return_to_virtual)
 	mov	r0, #0x1f
 	mcr	p15, 0, r0, c3, c0, 0	@ domain access register
 
-	mov32	r0, 0xff0a81a8
+	mov32	r0, 0xff0a89a8
 #ifdef CONFIG_SMP
-	mov32	r1, 0xc0e0c0e0
+	mov32	r1, 0xc0e0c4e0
 #else
-	mov32	r1, 0x40e040e0
+	mov32	r1, 0x40e044e0
 #endif
 	mcr	p15, 0, r0, c10, c2, 0	@ PRRR
 	mcr	p15, 0, r1, c10, c2, 1	@ NMRR