From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Sun, 23 Nov 2014 02:57:52 +0000 (+0000)
Subject: R600: Fix assert on copy of an i1 on pre-SI
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=716ce08250a9806873126ae1698c1c8c21d9ac46;p=oota-llvm.git

R600: Fix assert on copy of an i1 on pre-SI

i1 is not a legal type on Evergreen, so this combine proceeded
and tried to produce a bitcast between i1 and i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222630 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index 2f95b74fcf7..9ff41afe30b 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -2155,7 +2155,8 @@ SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,
   SDValue Value = SN->getValue();
   EVT VT = Value.getValueType();
 
-  if (isTypeLegal(VT) || SN->isVolatile() || !ISD::isNormalLoad(Value.getNode()))
+  if (isTypeLegal(VT) || SN->isVolatile() ||
+      !ISD::isNormalLoad(Value.getNode()) || VT.getSizeInBits() < 8)
     return SDValue();
 
   LoadSDNode *LoadVal = cast<LoadSDNode>(Value);