From: Vikram S. Adve Date: Wed, 2 Jul 2003 01:16:01 +0000 (+0000) Subject: A def. operand of a machine instruction may be an ordinary Value*, X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=74d15d36f5ae146853b6089ed4a76a381b11cbb3;p=oota-llvm.git A def. operand of a machine instruction may be an ordinary Value*, not just an Instruction*, at least in one unfortunate case: the first operand to the va_arg instruction. Modify ValueToDefVecMap to map from Value*, not Instruction*. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7052 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/InstrSched/SchedGraph.cpp b/lib/CodeGen/InstrSched/SchedGraph.cpp index 51fca9d9d87..899e188dab4 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.cpp +++ b/lib/CodeGen/InstrSched/SchedGraph.cpp @@ -34,9 +34,9 @@ struct RegToRefVecMap: public hash_map { typedef hash_map::const_iterator const_iterator; }; -struct ValueToDefVecMap: public hash_map { - typedef hash_map:: iterator iterator; - typedef hash_map::const_iterator const_iterator; +struct ValueToDefVecMap: public hash_map { + typedef hash_map:: iterator iterator; + typedef hash_map::const_iterator const_iterator; }; // @@ -636,8 +636,7 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& MI, { case MachineOperand::MO_VirtualRegister: case MachineOperand::MO_CCRegister: - if (const Instruction* srcI = - dyn_cast_or_null(MI.getOperand(i).getVRegValue())) + if (const Value* srcI = MI.getOperand(i).getVRegValue()) { ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI); if (I != valueToDefVecMap.end()) @@ -667,8 +666,7 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& MI, // for (unsigned i=0, N=MI.getNumImplicitRefs(); i < N; ++i) if (MI.getImplicitOp(i).opIsUse() || MI.getImplicitOp(i).opIsDefAndUse()) - if (const Instruction *srcI = - dyn_cast_or_null(MI.getImplicitRef(i))) + if (const Value* srcI = MI.getImplicitRef(i)) { ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI); if (I != valueToDefVecMap.end()) @@ -738,9 +736,9 @@ SchedGraph::findDefUseInfoAtInstr(const TargetMachine& target, assert((mop.getType() == MachineOperand::MO_VirtualRegister || mop.getType() == MachineOperand::MO_CCRegister) && "Do not expect any other kind of operand to be defined!"); + assert(mop.getVRegValue() != NULL && "Null value being defined?"); - const Instruction* defInstr = cast(mop.getVRegValue()); - valueToDefVecMap[defInstr].push_back(std::make_pair(node, i)); + valueToDefVecMap[mop.getVRegValue()].push_back(std::make_pair(node, i)); } // @@ -759,10 +757,11 @@ SchedGraph::findDefUseInfoAtInstr(const TargetMachine& target, continue; // nothing more to do } - if (mop.opIsDefOnly() || mop.opIsDefAndUse()) - if (const Instruction* defInstr = - dyn_cast_or_null(minstr.getImplicitRef(i))) - valueToDefVecMap[defInstr].push_back(std::make_pair(node, -i)); + if (mop.opIsDefOnly() || mop.opIsDefAndUse()) { + assert(minstr.getImplicitRef(i) != NULL && "Null value being defined?"); + valueToDefVecMap[minstr.getImplicitRef(i)].push_back(std::make_pair(node, + -i)); + } } } diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp index 51fca9d9d87..899e188dab4 100644 --- a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp +++ b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp @@ -34,9 +34,9 @@ struct RegToRefVecMap: public hash_map { typedef hash_map::const_iterator const_iterator; }; -struct ValueToDefVecMap: public hash_map { - typedef hash_map:: iterator iterator; - typedef hash_map::const_iterator const_iterator; +struct ValueToDefVecMap: public hash_map { + typedef hash_map:: iterator iterator; + typedef hash_map::const_iterator const_iterator; }; // @@ -636,8 +636,7 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& MI, { case MachineOperand::MO_VirtualRegister: case MachineOperand::MO_CCRegister: - if (const Instruction* srcI = - dyn_cast_or_null(MI.getOperand(i).getVRegValue())) + if (const Value* srcI = MI.getOperand(i).getVRegValue()) { ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI); if (I != valueToDefVecMap.end()) @@ -667,8 +666,7 @@ SchedGraph::addEdgesForInstruction(const MachineInstr& MI, // for (unsigned i=0, N=MI.getNumImplicitRefs(); i < N; ++i) if (MI.getImplicitOp(i).opIsUse() || MI.getImplicitOp(i).opIsDefAndUse()) - if (const Instruction *srcI = - dyn_cast_or_null(MI.getImplicitRef(i))) + if (const Value* srcI = MI.getImplicitRef(i)) { ValueToDefVecMap::const_iterator I = valueToDefVecMap.find(srcI); if (I != valueToDefVecMap.end()) @@ -738,9 +736,9 @@ SchedGraph::findDefUseInfoAtInstr(const TargetMachine& target, assert((mop.getType() == MachineOperand::MO_VirtualRegister || mop.getType() == MachineOperand::MO_CCRegister) && "Do not expect any other kind of operand to be defined!"); + assert(mop.getVRegValue() != NULL && "Null value being defined?"); - const Instruction* defInstr = cast(mop.getVRegValue()); - valueToDefVecMap[defInstr].push_back(std::make_pair(node, i)); + valueToDefVecMap[mop.getVRegValue()].push_back(std::make_pair(node, i)); } // @@ -759,10 +757,11 @@ SchedGraph::findDefUseInfoAtInstr(const TargetMachine& target, continue; // nothing more to do } - if (mop.opIsDefOnly() || mop.opIsDefAndUse()) - if (const Instruction* defInstr = - dyn_cast_or_null(minstr.getImplicitRef(i))) - valueToDefVecMap[defInstr].push_back(std::make_pair(node, -i)); + if (mop.opIsDefOnly() || mop.opIsDefAndUse()) { + assert(minstr.getImplicitRef(i) != NULL && "Null value being defined?"); + valueToDefVecMap[minstr.getImplicitRef(i)].push_back(std::make_pair(node, + -i)); + } } }