From: Peter Griffin Date: Wed, 10 Jun 2015 14:04:00 +0000 (+0200) Subject: ARM: STi: DT: Add STiH407 family tsout0 pinctrl configuration X-Git-Tag: firefly_0821_release~176^2~1183^2~45^2~8 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=75d28b8306f73419f38e3505b603b5d44dce39a0;p=firefly-linux-kernel-4.4.55.git ARM: STi: DT: Add STiH407 family tsout0 pinctrl configuration tsout0 channel can be configured for either serial or parallel data transfer. Both pin configurations are provided. Signed-off-by: Peter Griffin Signed-off-by: Maxime Coquelin --- diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index f513a29fbf33..d2ebb25fa5ca 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -568,6 +568,34 @@ }; }; }; + + tsout0 { + pinctrl_tsout0_parallel: tsout0_parallel { + st,pins { + DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA6 = <&pio12 1 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA5 = <&pio12 2 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA4 = <&pio12 3 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA2 = <&pio12 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA1 = <&pio12 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + DATA0 = <&pio12 7 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>; + VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + }; + }; + pinctrl_tsout0_serial: tsout0_serial { + st,pins { + DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>; + VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>; + }; + }; + }; }; pin-controller-front1 {