From: Vladimir Medic <Vladimir.Medic@imgtec.com>
Date: Tue, 4 Mar 2014 09:54:09 +0000 (+0000)
Subject: This patch implements .set mips32r2 directive and sets appropriate feature bits.... 
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7650bc0fd23f482d20b1e39f3c84289e9d605940;p=oota-llvm.git

This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202807 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 378235e1aaf..c6bee6302d8 100644
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -257,6 +257,20 @@ class MipsAsmParser : public MCTargetAsmParser {
   // Example: INSERT.B $w0[n], $1 => 16 > n >= 0
   bool validateMSAIndex(int Val, int RegKind);
 
+  void setFeatureBits(unsigned Feature, StringRef FeatureString) {
+    if (!(STI.getFeatureBits() & Feature)) {
+      setAvailableFeatures(ComputeAvailableFeatures(
+                           STI.ToggleFeature(FeatureString)));
+    }
+  }
+
+  void clearFeatureBits(unsigned Feature, StringRef FeatureString) {
+    if (STI.getFeatureBits() & Feature) {
+     setAvailableFeatures(ComputeAvailableFeatures(
+                           STI.ToggleFeature(FeatureString)));
+    }
+  }
+
 public:
   MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser,
                 const MCInstrInfo &MII)
@@ -2439,6 +2453,13 @@ bool MipsAsmParser::parseDirectiveSet() {
     getTargetStreamer().emitDirectiveSetMicroMips();
     Parser.eatToEndOfStatement();
     return false;
+  } else if (Tok.getString() == "mips32r2") {
+    Parser.Lex(); // Eat token.
+    if (getLexer().isNot(AsmToken::EndOfStatement))
+      return reportParseError("unexpected token in .set directive");
+    setFeatureBits(Mips::FeatureMips32r2,"mips32r2");
+    getTargetStreamer().emitDirectiveSetMips32R2();
+    return false;
   } else {
     // It is just an identifier, look for an assignment.
     parseSetAssignment();
diff --git a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 825c1644722..a46191f12cf 100644
--- a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -97,6 +97,10 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
      << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
 }
 
+void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
+  OS << "\t.set\tmips32r2\n";
+}
+
 // Print a 32 bit hex number with all numbers.
 static void printHex32(unsigned Value, raw_ostream &OS) {
   OS << "0x";
@@ -302,3 +306,7 @@ void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
                                       int FPUTopSavedRegOff) {
   // FIXME: implement.
 }
+
+void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
+  // No action required for ELF output.
+}
diff --git a/lib/Target/Mips/MipsTargetStreamer.h b/lib/Target/Mips/MipsTargetStreamer.h
index 6710666502d..b1132676a98 100644
--- a/lib/Target/Mips/MipsTargetStreamer.h
+++ b/lib/Target/Mips/MipsTargetStreamer.h
@@ -39,6 +39,8 @@ public:
                          unsigned ReturnReg) = 0;
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) = 0;
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) = 0;
+
+  virtual void emitDirectiveSetMips32R2() = 0;
 };
 
 // This part is for ascii assembly output
@@ -67,6 +69,8 @@ public:
                          unsigned ReturnReg);
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
+
+  virtual void emitDirectiveSetMips32R2();
 };
 
 // This part is for ELF object output
@@ -102,6 +106,8 @@ public:
                          unsigned ReturnReg);
   virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff);
   virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff);
+
+  virtual void emitDirectiveSetMips32R2();
 };
 }
 #endif
diff --git a/test/MC/Mips/mips_directives.s b/test/MC/Mips/mips_directives.s
index 0fb377edbc4..f3fd1aff516 100644
--- a/test/MC/Mips/mips_directives.s
+++ b/test/MC/Mips/mips_directives.s
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
+# RUN: llvm-mc -show-encoding -mcpu=mips32 -triple mips-unknown-unknown %s | FileCheck %s
 #
 # CHECK:  .text
 # CHECK:  $BB0_2:
@@ -49,3 +49,12 @@ $BB0_4:
 # CHECK:                               #   fixup A - offset: 0, value: ($tmp7)@ABS_HI, kind: fixup_Mips_HI16
     abs.s  f6,FPU_MASK
     lui $1, %hi($tmp7)
+
+# CHECK:    .set mips32r2
+# CHECK:    ldxc1   $f0, $zero($5)     # encoding: [0x4c,0xa0,0x00,0x01]
+# CHECK:    luxc1   $f0, $6($5)        # encoding: [0x4c,0xa6,0x00,0x05]
+# CHECK:    lwxc1   $f6, $2($5)        # encoding: [0x4c,0xa2,0x01,0x80]
+     .set mips32r2
+    ldxc1   $f0, $zero($5)
+    luxc1   $f0, $6($5)
+    lwxc1   $f6, $2($5)