From: Chris Lattner <sabre@nondot.org>
Date: Tue, 30 Nov 2004 06:29:10 +0000 (+0000)
Subject: Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7747040410fbeb4dcdc0edcdb450302427dd1762;p=oota-llvm.git

Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18371 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 2c43dcae902..33512c1e393 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -2766,7 +2766,12 @@ void PPC32ISel::emitShiftOperation(MachineBasicBlock *MBB,
     // than for a variable shift by using the rlwimi instruction.
     if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) {
       unsigned Amount = CUI->getValue();
-      if (Amount < 32) {
+      if (Amount == 0) {
+        BuildMI(*MBB, IP, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
+        BuildMI(*MBB, IP, PPC::OR, 2, DestReg+1)
+          .addReg(SrcReg+1).addReg(SrcReg+1);
+
+      } else if (Amount < 32) {
         unsigned TempReg = makeAnotherReg(ResultTy);
         if (isLeftShift) {
           BuildMI(*MBB, IP, PPC::RLWINM, 4, TempReg).addReg(SrcReg)