From: Huang, Tao <huangtao@rock-chips.com>
Date: Wed, 9 Mar 2016 11:11:02 +0000 (+0800)
Subject: Revert "ARM64: dts: rockchip: add emmc, sdio and sdmmc node for rk3399"
X-Git-Tag: firefly_0821_release~3236
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7755a74444e90e4fc95a8d4d2ba4b4a0c2d249bc;p=firefly-linux-kernel-4.4.55.git

Revert "ARM64: dts: rockchip: add emmc, sdio and sdmmc node for rk3399"

This reverts commit d3e94b630981c7aabe0f041e547c78a7bd3d3ec4.

ERROR (reg_format): "reg" property in /phy has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)

Change-Id: I92c498906248c08aade2e36967f896fdd1094abc
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 20d930e9d8a1..3e697d590ec4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -188,49 +188,6 @@
 		};
 	};
 
-	emmc_phy: phy {
-		compatible = "rockchip,rk3399-emmc-phy";
-		reg = <0x0 0xf780>;
-		#phy-cells = <0>;
-		rockchip,grf = <&grf>;
-		status = "disabled";
-	};
-
-	sdio0: dwmmc@fe310000 {
-		compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xfe310000 0x0 0x4000>;
-		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
-		clock-freq-min-max = <400000 150000000>;
-		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
-			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-		fifo-depth = <0x100>;
-		status = "disabled";
-	};
-
-	sdmmc: dwmmc@fe320000 {
-		compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xfe320000 0x0 0x4000>;
-		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-		clock-freq-min-max = <400000 150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
-			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
-		fifo-depth = <0x100>;
-		status = "disabled";
-	};
-
-	sdhci: sdhci@fe330000 {
-		compatible = "arasan,sdhci-5.1";
-		reg = <0x0 0xfe330000 0x0 0x10000>;
-		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
-		clock-names = "clk_xin", "clk_ahb";
-		phys = <&emmc_phy>;
-		phy-names = "phy_arasan";
-		status = "disabled";
-	};
-
 	uart0: serial@ff180000 {
 		compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff180000 0x0 0x100>;