From: Herbert Xu <herbert@gondor.apana.org.au>
Date: Thu, 18 Jun 2015 06:25:56 +0000 (+0800)
Subject: crypto: caam - Set last bit on src SG list
X-Git-Tag: firefly_0821_release~176^2~1617^2~32
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7793bda8fe372fe2e71f16d0619b630d6e41c8ba;p=firefly-linux-kernel-4.4.55.git

crypto: caam - Set last bit on src SG list

The new aead_edesc_alloc left out the bit indicating the last
entry on the source SG list.  This patch fixes it.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---

diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 789c385f2e47..daca933a82ec 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -2624,7 +2624,7 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
 
 	sec4_sg_index = 0;
 	if (!all_contig) {
-		sg_to_sec4_sg(req->src, src_nents,
+		sg_to_sec4_sg_last(req->src, src_nents,
 			      edesc->sec4_sg + sec4_sg_index, 0);
 		sec4_sg_index += src_nents;
 	}