From: Vasanthakumar Thiagarajan Date: Wed, 4 May 2011 08:53:54 +0000 (+0530) Subject: ath6kl: Remove unused eeprom.c X-Git-Tag: firefly_0821_release~7613^2~1326^2~505 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7c370f91507d484fc2b7684316da6d468bfaecbd;p=firefly-linux-kernel-4.4.55.git ath6kl: Remove unused eeprom.c Also delete si_reg.h which is only used in eeprom.c Signed-off-by: Vasanthakumar Thiagarajan Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/si_reg.h b/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/si_reg.h deleted file mode 100644 index 2cd2e3cadbbc..000000000000 --- a/drivers/staging/ath6kl/include/common/AR6002/hw4.0/hw/si_reg.h +++ /dev/null @@ -1,209 +0,0 @@ -// ------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// ------------------------------------------------------------------ -//=================================================================== -// Author(s): ="Atheros" -//=================================================================== - - -#ifndef _SI_REG_REG_H_ -#define _SI_REG_REG_H_ - -#define SI_CONFIG_ADDRESS 0x00000000 -#define SI_CONFIG_OFFSET 0x00000000 -#define SI_CONFIG_ERR_INT_MSB 19 -#define SI_CONFIG_ERR_INT_LSB 19 -#define SI_CONFIG_ERR_INT_MASK 0x00080000 -#define SI_CONFIG_ERR_INT_GET(x) (((x) & SI_CONFIG_ERR_INT_MASK) >> SI_CONFIG_ERR_INT_LSB) -#define SI_CONFIG_ERR_INT_SET(x) (((x) << SI_CONFIG_ERR_INT_LSB) & SI_CONFIG_ERR_INT_MASK) -#define SI_CONFIG_BIDIR_OD_DATA_MSB 18 -#define SI_CONFIG_BIDIR_OD_DATA_LSB 18 -#define SI_CONFIG_BIDIR_OD_DATA_MASK 0x00040000 -#define SI_CONFIG_BIDIR_OD_DATA_GET(x) (((x) & SI_CONFIG_BIDIR_OD_DATA_MASK) >> SI_CONFIG_BIDIR_OD_DATA_LSB) -#define SI_CONFIG_BIDIR_OD_DATA_SET(x) (((x) << SI_CONFIG_BIDIR_OD_DATA_LSB) & SI_CONFIG_BIDIR_OD_DATA_MASK) -#define SI_CONFIG_I2C_MSB 16 -#define SI_CONFIG_I2C_LSB 16 -#define SI_CONFIG_I2C_MASK 0x00010000 -#define SI_CONFIG_I2C_GET(x) (((x) & SI_CONFIG_I2C_MASK) >> SI_CONFIG_I2C_LSB) -#define SI_CONFIG_I2C_SET(x) (((x) << SI_CONFIG_I2C_LSB) & SI_CONFIG_I2C_MASK) -#define SI_CONFIG_POS_SAMPLE_MSB 7 -#define SI_CONFIG_POS_SAMPLE_LSB 7 -#define SI_CONFIG_POS_SAMPLE_MASK 0x00000080 -#define SI_CONFIG_POS_SAMPLE_GET(x) (((x) & SI_CONFIG_POS_SAMPLE_MASK) >> SI_CONFIG_POS_SAMPLE_LSB) -#define SI_CONFIG_POS_SAMPLE_SET(x) (((x) << SI_CONFIG_POS_SAMPLE_LSB) & SI_CONFIG_POS_SAMPLE_MASK) -#define SI_CONFIG_POS_DRIVE_MSB 6 -#define SI_CONFIG_POS_DRIVE_LSB 6 -#define SI_CONFIG_POS_DRIVE_MASK 0x00000040 -#define SI_CONFIG_POS_DRIVE_GET(x) (((x) & SI_CONFIG_POS_DRIVE_MASK) >> SI_CONFIG_POS_DRIVE_LSB) -#define SI_CONFIG_POS_DRIVE_SET(x) (((x) << SI_CONFIG_POS_DRIVE_LSB) & SI_CONFIG_POS_DRIVE_MASK) -#define SI_CONFIG_INACTIVE_DATA_MSB 5 -#define SI_CONFIG_INACTIVE_DATA_LSB 5 -#define SI_CONFIG_INACTIVE_DATA_MASK 0x00000020 -#define SI_CONFIG_INACTIVE_DATA_GET(x) (((x) & SI_CONFIG_INACTIVE_DATA_MASK) >> SI_CONFIG_INACTIVE_DATA_LSB) -#define SI_CONFIG_INACTIVE_DATA_SET(x) (((x) << SI_CONFIG_INACTIVE_DATA_LSB) & SI_CONFIG_INACTIVE_DATA_MASK) -#define SI_CONFIG_INACTIVE_CLK_MSB 4 -#define SI_CONFIG_INACTIVE_CLK_LSB 4 -#define SI_CONFIG_INACTIVE_CLK_MASK 0x00000010 -#define SI_CONFIG_INACTIVE_CLK_GET(x) (((x) & SI_CONFIG_INACTIVE_CLK_MASK) >> SI_CONFIG_INACTIVE_CLK_LSB) -#define SI_CONFIG_INACTIVE_CLK_SET(x) (((x) << SI_CONFIG_INACTIVE_CLK_LSB) & SI_CONFIG_INACTIVE_CLK_MASK) -#define SI_CONFIG_DIVIDER_MSB 3 -#define SI_CONFIG_DIVIDER_LSB 0 -#define SI_CONFIG_DIVIDER_MASK 0x0000000f -#define SI_CONFIG_DIVIDER_GET(x) (((x) & SI_CONFIG_DIVIDER_MASK) >> SI_CONFIG_DIVIDER_LSB) -#define SI_CONFIG_DIVIDER_SET(x) (((x) << SI_CONFIG_DIVIDER_LSB) & SI_CONFIG_DIVIDER_MASK) - -#define SI_CS_ADDRESS 0x00000004 -#define SI_CS_OFFSET 0x00000004 -#define SI_CS_BIT_CNT_IN_LAST_BYTE_MSB 13 -#define SI_CS_BIT_CNT_IN_LAST_BYTE_LSB 11 -#define SI_CS_BIT_CNT_IN_LAST_BYTE_MASK 0x00003800 -#define SI_CS_BIT_CNT_IN_LAST_BYTE_GET(x) (((x) & SI_CS_BIT_CNT_IN_LAST_BYTE_MASK) >> SI_CS_BIT_CNT_IN_LAST_BYTE_LSB) -#define SI_CS_BIT_CNT_IN_LAST_BYTE_SET(x) (((x) << SI_CS_BIT_CNT_IN_LAST_BYTE_LSB) & SI_CS_BIT_CNT_IN_LAST_BYTE_MASK) -#define SI_CS_DONE_ERR_MSB 10 -#define SI_CS_DONE_ERR_LSB 10 -#define SI_CS_DONE_ERR_MASK 0x00000400 -#define SI_CS_DONE_ERR_GET(x) (((x) & SI_CS_DONE_ERR_MASK) >> SI_CS_DONE_ERR_LSB) -#define SI_CS_DONE_ERR_SET(x) (((x) << SI_CS_DONE_ERR_LSB) & SI_CS_DONE_ERR_MASK) -#define SI_CS_DONE_INT_MSB 9 -#define SI_CS_DONE_INT_LSB 9 -#define SI_CS_DONE_INT_MASK 0x00000200 -#define SI_CS_DONE_INT_GET(x) (((x) & SI_CS_DONE_INT_MASK) >> SI_CS_DONE_INT_LSB) -#define SI_CS_DONE_INT_SET(x) (((x) << SI_CS_DONE_INT_LSB) & SI_CS_DONE_INT_MASK) -#define SI_CS_START_MSB 8 -#define SI_CS_START_LSB 8 -#define SI_CS_START_MASK 0x00000100 -#define SI_CS_START_GET(x) (((x) & SI_CS_START_MASK) >> SI_CS_START_LSB) -#define SI_CS_START_SET(x) (((x) << SI_CS_START_LSB) & SI_CS_START_MASK) -#define SI_CS_RX_CNT_MSB 7 -#define SI_CS_RX_CNT_LSB 4 -#define SI_CS_RX_CNT_MASK 0x000000f0 -#define SI_CS_RX_CNT_GET(x) (((x) & SI_CS_RX_CNT_MASK) >> SI_CS_RX_CNT_LSB) -#define SI_CS_RX_CNT_SET(x) (((x) << SI_CS_RX_CNT_LSB) & SI_CS_RX_CNT_MASK) -#define SI_CS_TX_CNT_MSB 3 -#define SI_CS_TX_CNT_LSB 0 -#define SI_CS_TX_CNT_MASK 0x0000000f -#define SI_CS_TX_CNT_GET(x) (((x) & SI_CS_TX_CNT_MASK) >> SI_CS_TX_CNT_LSB) -#define SI_CS_TX_CNT_SET(x) (((x) << SI_CS_TX_CNT_LSB) & SI_CS_TX_CNT_MASK) - -#define SI_TX_DATA0_ADDRESS 0x00000008 -#define SI_TX_DATA0_OFFSET 0x00000008 -#define SI_TX_DATA0_DATA3_MSB 31 -#define SI_TX_DATA0_DATA3_LSB 24 -#define SI_TX_DATA0_DATA3_MASK 0xff000000 -#define SI_TX_DATA0_DATA3_GET(x) (((x) & SI_TX_DATA0_DATA3_MASK) >> SI_TX_DATA0_DATA3_LSB) -#define SI_TX_DATA0_DATA3_SET(x) (((x) << SI_TX_DATA0_DATA3_LSB) & SI_TX_DATA0_DATA3_MASK) -#define SI_TX_DATA0_DATA2_MSB 23 -#define SI_TX_DATA0_DATA2_LSB 16 -#define SI_TX_DATA0_DATA2_MASK 0x00ff0000 -#define SI_TX_DATA0_DATA2_GET(x) (((x) & SI_TX_DATA0_DATA2_MASK) >> SI_TX_DATA0_DATA2_LSB) -#define SI_TX_DATA0_DATA2_SET(x) (((x) << SI_TX_DATA0_DATA2_LSB) & SI_TX_DATA0_DATA2_MASK) -#define SI_TX_DATA0_DATA1_MSB 15 -#define SI_TX_DATA0_DATA1_LSB 8 -#define SI_TX_DATA0_DATA1_MASK 0x0000ff00 -#define SI_TX_DATA0_DATA1_GET(x) (((x) & SI_TX_DATA0_DATA1_MASK) >> SI_TX_DATA0_DATA1_LSB) -#define SI_TX_DATA0_DATA1_SET(x) (((x) << SI_TX_DATA0_DATA1_LSB) & SI_TX_DATA0_DATA1_MASK) -#define SI_TX_DATA0_DATA0_MSB 7 -#define SI_TX_DATA0_DATA0_LSB 0 -#define SI_TX_DATA0_DATA0_MASK 0x000000ff -#define SI_TX_DATA0_DATA0_GET(x) (((x) & SI_TX_DATA0_DATA0_MASK) >> SI_TX_DATA0_DATA0_LSB) -#define SI_TX_DATA0_DATA0_SET(x) (((x) << SI_TX_DATA0_DATA0_LSB) & SI_TX_DATA0_DATA0_MASK) - -#define SI_TX_DATA1_ADDRESS 0x0000000c -#define SI_TX_DATA1_OFFSET 0x0000000c -#define SI_TX_DATA1_DATA7_MSB 31 -#define SI_TX_DATA1_DATA7_LSB 24 -#define SI_TX_DATA1_DATA7_MASK 0xff000000 -#define SI_TX_DATA1_DATA7_GET(x) (((x) & SI_TX_DATA1_DATA7_MASK) >> SI_TX_DATA1_DATA7_LSB) -#define SI_TX_DATA1_DATA7_SET(x) (((x) << SI_TX_DATA1_DATA7_LSB) & SI_TX_DATA1_DATA7_MASK) -#define SI_TX_DATA1_DATA6_MSB 23 -#define SI_TX_DATA1_DATA6_LSB 16 -#define SI_TX_DATA1_DATA6_MASK 0x00ff0000 -#define SI_TX_DATA1_DATA6_GET(x) (((x) & SI_TX_DATA1_DATA6_MASK) >> SI_TX_DATA1_DATA6_LSB) -#define SI_TX_DATA1_DATA6_SET(x) (((x) << SI_TX_DATA1_DATA6_LSB) & SI_TX_DATA1_DATA6_MASK) -#define SI_TX_DATA1_DATA5_MSB 15 -#define SI_TX_DATA1_DATA5_LSB 8 -#define SI_TX_DATA1_DATA5_MASK 0x0000ff00 -#define SI_TX_DATA1_DATA5_GET(x) (((x) & SI_TX_DATA1_DATA5_MASK) >> SI_TX_DATA1_DATA5_LSB) -#define SI_TX_DATA1_DATA5_SET(x) (((x) << SI_TX_DATA1_DATA5_LSB) & SI_TX_DATA1_DATA5_MASK) -#define SI_TX_DATA1_DATA4_MSB 7 -#define SI_TX_DATA1_DATA4_LSB 0 -#define SI_TX_DATA1_DATA4_MASK 0x000000ff -#define SI_TX_DATA1_DATA4_GET(x) (((x) & SI_TX_DATA1_DATA4_MASK) >> SI_TX_DATA1_DATA4_LSB) -#define SI_TX_DATA1_DATA4_SET(x) (((x) << SI_TX_DATA1_DATA4_LSB) & SI_TX_DATA1_DATA4_MASK) - -#define SI_RX_DATA0_ADDRESS 0x00000010 -#define SI_RX_DATA0_OFFSET 0x00000010 -#define SI_RX_DATA0_DATA3_MSB 31 -#define SI_RX_DATA0_DATA3_LSB 24 -#define SI_RX_DATA0_DATA3_MASK 0xff000000 -#define SI_RX_DATA0_DATA3_GET(x) (((x) & SI_RX_DATA0_DATA3_MASK) >> SI_RX_DATA0_DATA3_LSB) -#define SI_RX_DATA0_DATA3_SET(x) (((x) << SI_RX_DATA0_DATA3_LSB) & SI_RX_DATA0_DATA3_MASK) -#define SI_RX_DATA0_DATA2_MSB 23 -#define SI_RX_DATA0_DATA2_LSB 16 -#define SI_RX_DATA0_DATA2_MASK 0x00ff0000 -#define SI_RX_DATA0_DATA2_GET(x) (((x) & SI_RX_DATA0_DATA2_MASK) >> SI_RX_DATA0_DATA2_LSB) -#define SI_RX_DATA0_DATA2_SET(x) (((x) << SI_RX_DATA0_DATA2_LSB) & SI_RX_DATA0_DATA2_MASK) -#define SI_RX_DATA0_DATA1_MSB 15 -#define SI_RX_DATA0_DATA1_LSB 8 -#define SI_RX_DATA0_DATA1_MASK 0x0000ff00 -#define SI_RX_DATA0_DATA1_GET(x) (((x) & SI_RX_DATA0_DATA1_MASK) >> SI_RX_DATA0_DATA1_LSB) -#define SI_RX_DATA0_DATA1_SET(x) (((x) << SI_RX_DATA0_DATA1_LSB) & SI_RX_DATA0_DATA1_MASK) -#define SI_RX_DATA0_DATA0_MSB 7 -#define SI_RX_DATA0_DATA0_LSB 0 -#define SI_RX_DATA0_DATA0_MASK 0x000000ff -#define SI_RX_DATA0_DATA0_GET(x) (((x) & SI_RX_DATA0_DATA0_MASK) >> SI_RX_DATA0_DATA0_LSB) -#define SI_RX_DATA0_DATA0_SET(x) (((x) << SI_RX_DATA0_DATA0_LSB) & SI_RX_DATA0_DATA0_MASK) - -#define SI_RX_DATA1_ADDRESS 0x00000014 -#define SI_RX_DATA1_OFFSET 0x00000014 -#define SI_RX_DATA1_DATA7_MSB 31 -#define SI_RX_DATA1_DATA7_LSB 24 -#define SI_RX_DATA1_DATA7_MASK 0xff000000 -#define SI_RX_DATA1_DATA7_GET(x) (((x) & SI_RX_DATA1_DATA7_MASK) >> SI_RX_DATA1_DATA7_LSB) -#define SI_RX_DATA1_DATA7_SET(x) (((x) << SI_RX_DATA1_DATA7_LSB) & SI_RX_DATA1_DATA7_MASK) -#define SI_RX_DATA1_DATA6_MSB 23 -#define SI_RX_DATA1_DATA6_LSB 16 -#define SI_RX_DATA1_DATA6_MASK 0x00ff0000 -#define SI_RX_DATA1_DATA6_GET(x) (((x) & SI_RX_DATA1_DATA6_MASK) >> SI_RX_DATA1_DATA6_LSB) -#define SI_RX_DATA1_DATA6_SET(x) (((x) << SI_RX_DATA1_DATA6_LSB) & SI_RX_DATA1_DATA6_MASK) -#define SI_RX_DATA1_DATA5_MSB 15 -#define SI_RX_DATA1_DATA5_LSB 8 -#define SI_RX_DATA1_DATA5_MASK 0x0000ff00 -#define SI_RX_DATA1_DATA5_GET(x) (((x) & SI_RX_DATA1_DATA5_MASK) >> SI_RX_DATA1_DATA5_LSB) -#define SI_RX_DATA1_DATA5_SET(x) (((x) << SI_RX_DATA1_DATA5_LSB) & SI_RX_DATA1_DATA5_MASK) -#define SI_RX_DATA1_DATA4_MSB 7 -#define SI_RX_DATA1_DATA4_LSB 0 -#define SI_RX_DATA1_DATA4_MASK 0x000000ff -#define SI_RX_DATA1_DATA4_GET(x) (((x) & SI_RX_DATA1_DATA4_MASK) >> SI_RX_DATA1_DATA4_LSB) -#define SI_RX_DATA1_DATA4_SET(x) (((x) << SI_RX_DATA1_DATA4_LSB) & SI_RX_DATA1_DATA4_MASK) - - -#ifndef __ASSEMBLER__ - -typedef struct si_reg_reg_s { - volatile unsigned int si_config; - volatile unsigned int si_cs; - volatile unsigned int si_tx_data0; - volatile unsigned int si_tx_data1; - volatile unsigned int si_rx_data0; - volatile unsigned int si_rx_data1; -} si_reg_reg_t; - -#endif /* __ASSEMBLER__ */ - -#endif /* _SI_REG_H_ */ diff --git a/drivers/staging/ath6kl/miscdrv/common_drv.c b/drivers/staging/ath6kl/miscdrv/common_drv.c index abd1e9c436c7..b7b09b70d6eb 100644 --- a/drivers/staging/ath6kl/miscdrv/common_drv.c +++ b/drivers/staging/ath6kl/miscdrv/common_drv.c @@ -25,7 +25,6 @@ #include "athdefs.h" #include "hw/mbox_host_reg.h" -#include "hw/si_reg.h" #include "AR6002/hw2.0/hw/gpio_reg.h" #include "hw/rtc_reg.h" #include "hw/mbox_reg.h" diff --git a/drivers/staging/ath6kl/os/linux/eeprom.c b/drivers/staging/ath6kl/os/linux/eeprom.c deleted file mode 100644 index 1dcd0cfb8f72..000000000000 --- a/drivers/staging/ath6kl/os/linux/eeprom.c +++ /dev/null @@ -1,361 +0,0 @@ -//------------------------------------------------------------------------------ -// Copyright (c) 2004-2010 Atheros Communications Inc. -// All rights reserved. -// -// -// -// Permission to use, copy, modify, and/or distribute this software for any -// purpose with or without fee is hereby granted, provided that the above -// copyright notice and this permission notice appear in all copies. -// -// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -// -// -// -// Author(s): ="Atheros" -//------------------------------------------------------------------------------ - - -#include "ar6000_drv.h" -#include "htc.h" -#include - -#include "AR6002/hw2.0/hw/gpio_reg.h" -#include "hw/si_reg.h" - -// -// defines -// - -#define MAX_FILENAME 1023 -#define EEPROM_WAIT_LIMIT 16 - -#define HOST_INTEREST_ITEM_ADDRESS(item) \ - (AR6002_HOST_INTEREST_ITEM_ADDRESS(item)) - -#define EEPROM_SZ 768 - -/* soft mac */ -#define ATH_MAC_LEN 6 -#define ATH_SOFT_MAC_TMP_BUF_LEN 64 -unsigned char mac_addr[ATH_MAC_LEN]; -unsigned char soft_mac_tmp_buf[ATH_SOFT_MAC_TMP_BUF_LEN]; -char *p_mac = NULL; -/* soft mac */ - -// -// static variables -// - -static u8 eeprom_data[EEPROM_SZ]; -static u32 sys_sleep_reg; -static struct hif_device *p_bmi_device; - -// -// Functions -// - -/* soft mac */ -static int -wmic_ether_aton(const char *orig, u8 *eth) -{ - const char *bufp; - int i; - - i = 0; - for(bufp = orig; *bufp != '\0'; ++bufp) { - unsigned int val; - int h, l; - - h = hex_to_bin(*bufp++); - - if (h < 0) { - printk("%s: MAC value is invalid\n", __FUNCTION__); - break; - } - - l = hex_to_bin(*bufp++); - if (l < 0) { - printk("%s: MAC value is invalid\n", __FUNCTION__); - break; - } - - val = (h << 4) | l; - - eth[i] = (unsigned char) (val & 0377); - if(++i == ATH_MAC_LEN) { - /* That's it. Any trailing junk? */ - if (*bufp != '\0') { - return 0; - } - return 1; - } - if (*bufp != ':') - break; - } - return 0; -} - -static void -update_mac(unsigned char *eeprom, int size, unsigned char *macaddr) -{ - int i; - u16 *ptr = (u16 *)(eeprom+4); - u16 checksum = 0; - - memcpy(eeprom+10,macaddr,6); - - *ptr = 0; - ptr = (u16 *)eeprom; - - for (i=0; i>7)); - - BMI_write_reg(SI_BASE_ADDRESS+SI_TX_DATA0_OFFSET, regval); - - regval = SI_CS_START_SET(1) | - SI_CS_RX_CNT_SET(8) | - SI_CS_TX_CNT_SET(3); - BMI_write_reg(SI_BASE_ADDRESS+SI_CS_OFFSET, regval); -} - -/* - * Tell the Target to start a 4-byte write to EEPROM, - * writing values from Target TX_DATA registers. - */ -static void -request_4byte_write(int offset, u32 data) -{ - u32 regval; - - printk("%s: request_4byte_write (0x%x) to offset 0x%x\n", __FUNCTION__, data, offset); - - /* SI_TX_DATA0 = write data to offset */ - regval = ((data & 0xffff) <<16) | - ((offset & 0xff)<<8) | - (0xa0 | ((offset & 0xff00)>>7)); - BMI_write_reg(SI_BASE_ADDRESS+SI_TX_DATA0_OFFSET, regval); - - regval = data >> 16; - BMI_write_reg(SI_BASE_ADDRESS+SI_TX_DATA1_OFFSET, regval); - - regval = SI_CS_START_SET(1) | - SI_CS_RX_CNT_SET(0) | - SI_CS_TX_CNT_SET(6); - BMI_write_reg(SI_BASE_ADDRESS+SI_CS_OFFSET, regval); -} - -/* - * Check whether or not an EEPROM request that was started - * earlier has completed yet. - */ -static bool -request_in_progress(void) -{ - u32 regval; - - /* Wait for DONE_INT in SI_CS */ - BMI_read_reg(SI_BASE_ADDRESS+SI_CS_OFFSET, ®val); - -// printk("%s: request in progress SI_CS=0x%x\n", __FUNCTION__, regval); - if (regval & SI_CS_DONE_ERR_MASK) { - printk("%s: EEPROM signaled ERROR (0x%x)\n", __FUNCTION__, regval); - } - - return (!(regval & SI_CS_DONE_INT_MASK)); -} - -/* - * try to detect the type of EEPROM,16bit address or 8bit address - */ - -static void eeprom_type_detect(void) -{ - u32 regval; - u8 i = 0; - - request_8byte_read(0x100); - /* Wait for DONE_INT in SI_CS */ - do{ - BMI_read_reg(SI_BASE_ADDRESS+SI_CS_OFFSET, ®val); - if (regval & SI_CS_DONE_ERR_MASK) { - printk("%s: ERROR : address type was wrongly set\n", __FUNCTION__); - break; - } - if (i++ == EEPROM_WAIT_LIMIT) { - printk("%s: EEPROM not responding\n", __FUNCTION__); - } - } while(!(regval & SI_CS_DONE_INT_MASK)); -} - -/* - * Extract the results of a completed EEPROM Read request - * and return them to the caller. - */ -inline void -read_8byte_results(u32 *data) -{ - /* Read SI_RX_DATA0 and SI_RX_DATA1 */ - BMI_read_reg(SI_BASE_ADDRESS+SI_RX_DATA0_OFFSET, &data[0]); - BMI_read_reg(SI_BASE_ADDRESS+SI_RX_DATA1_OFFSET, &data[1]); -} - - -/* - * Wait for a previously started command to complete. - * Timeout if the command is takes "too long". - */ -static void -wait_for_eeprom_completion(void) -{ - int i=0; - - while (request_in_progress()) { - if (i++ == EEPROM_WAIT_LIMIT) { - printk("%s: EEPROM not responding\n", __FUNCTION__); - } - } -} - -/* - * High-level function which starts an 8-byte read, - * waits for it to complete, and returns the result. - */ -static void -fetch_8bytes(int offset, u32 *data) -{ - request_8byte_read(offset); - wait_for_eeprom_completion(); - read_8byte_results(data); - - /* Clear any pending intr */ - BMI_write_reg(SI_BASE_ADDRESS+SI_CS_OFFSET, SI_CS_DONE_INT_MASK); -} - -/* - * High-level function which starts a 4-byte write, - * and waits for it to complete. - */ -inline void -commit_4bytes(int offset, u32 data) -{ - request_4byte_write(offset, data); - wait_for_eeprom_completion(); -}