From: Jason Wang Date: Sat, 21 Aug 2010 08:24:04 +0000 (+0800) Subject: mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function X-Git-Tag: firefly_0821_release~9833^2~590^2~8^2~1 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=7f67bff58662604874778e6853e5c394f944e554;p=firefly-linux-kernel-4.4.55.git mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function We can see MXC_CCM_CCGRx_MOD_OFF is defined as 0 while MXC_CCM_CCGRx_CG_MASK is defined as 0x3 in crm_regs.h, here in the _clk_ccgr_disable function, we want to clear the corresponding enable bit fields to disable this clock, so we should choose MASK instead of OFF otherwise clocks can't be disabled. Signed-off-by: Jason Wang Signed-off-by: Sascha Hauer --- diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 6af69def357f..57c10a9926cc 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c @@ -56,7 +56,7 @@ static void _clk_ccgr_disable(struct clk *clk) { u32 reg; reg = __raw_readl(clk->enable_reg); - reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift); + reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift); __raw_writel(reg, clk->enable_reg); }