From: Mark Yao Date: Fri, 20 Jan 2017 07:15:35 +0000 (+0800) Subject: drm/rockchip: dw_hdmi: move vpll set rate to encoder enable X-Git-Tag: firefly_0821_release~700 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=80182138a03e43da2269ec20cd857b58bffb5adb;p=firefly-linux-kernel-4.4.55.git drm/rockchip: dw_hdmi: move vpll set rate to encoder enable Change-Id: I5cf7f32f15cf1ea3e85b69009615756be3809c5e Signed-off-by: Mark Yao --- diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 02e424b6f3ad..fe023bc61ee0 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -336,23 +336,19 @@ dw_hdmi_rockchip_encoder_mode_fixup(struct drm_encoder *encoder, return false; } -static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); - - clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000); -} - static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder) { struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); + struct drm_crtc *crtc = encoder->crtc; u32 lcdsel_grf_reg, lcdsel_mask; u32 val; int mux; int ret; + if (WARN_ON(!crtc || !crtc->state)) + return; + clk_set_rate(hdmi->vpll_clk, crtc->state->adjusted_mode.clock * 1000); + switch (hdmi->dev_type) { case RK3288_HDMI: lcdsel_grf_reg = RK3288_GRF_SOC_CON6; @@ -401,7 +397,6 @@ dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder, static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = { .mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup, - .mode_set = dw_hdmi_rockchip_encoder_mode_set, .enable = dw_hdmi_rockchip_encoder_enable, .disable = dw_hdmi_rockchip_encoder_disable, .atomic_check = dw_hdmi_rockchip_encoder_atomic_check,