From: Nishanth Menon <nm@ti.com>
Date: Tue, 21 Oct 2014 14:30:46 +0000 (-0500)
Subject: ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
X-Git-Tag: firefly_0821_release~176^2~2656^2~13^2~18
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=829acd07793538cbb19ee416e8917d7560fa47c8;p=firefly-linux-kernel-4.4.55.git

ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC

Even thought sys_nirq1 is hardwired on the SoC for the pin, it is
better to configure the pin to the required mux configuration.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index b135aab0aa5f..5d26fa1144e3 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -65,6 +65,12 @@
 			0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
 		>;
 	};
+
+	tps65917_pins_default: tps65917_pins_default {
+		pinctrl-single,pins = <
+			0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
+		>;
+	};
 };
 
 &i2c1 {
@@ -77,6 +83,9 @@
 		compatible = "ti,tps65917";
 		reg = <0x58>;
 
+		pinctrl-names = "default";
+		pinctrl-0 = <&tps65917_pins_default>;
+
 		interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>;  /* IRQ_SYS_1N */
 		interrupt-parent = <&gic>;
 		interrupt-controller;