From: Rafael Espindola Date: Mon, 28 Oct 2013 22:05:05 +0000 (+0000) Subject: Convert another llc -filetype=obj test. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=82c2703167bcc4132ff6eeff128268d8d13029a1;p=oota-llvm.git Convert another llc -filetype=obj test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193546 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/PowerPC/tls-gd-obj.ll b/test/CodeGen/PowerPC/tls-gd-obj.ll deleted file mode 100644 index 26cb6f28efc..00000000000 --- a/test/CodeGen/PowerPC/tls-gd-obj.ll +++ /dev/null @@ -1,31 +0,0 @@ -; RUN: llc -mcpu=pwr7 -O0 -filetype=obj -relocation-model=pic %s -o - | \ -; RUN: llvm-readobj -r | FileCheck %s - -; Test correct relocation generation for thread-local storage using -; the general dynamic model and integrated assembly. - -target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" -target triple = "powerpc64-unknown-linux-gnu" - -@a = thread_local global i32 0, align 4 - -define signext i32 @main() nounwind { -entry: - %retval = alloca i32, align 4 - store i32 0, i32* %retval - %0 = load i32* @a, align 4 - ret i32 %0 -} - -; Verify generation of R_PPC64_GOT_TLSGD16_HA, R_PPC64_GOT_TLSGD16_LO, -; and R_PPC64_TLSGD for accessing external variable a, and R_PPC64_REL24 -; for the call to __tls_get_addr. -; -; CHECK: Relocations [ -; CHECK: Section (2) .rela.text { -; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a -; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a -; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSGD a -; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr -; CHECK: } -; CHECK: ] diff --git a/test/MC/PowerPC/tls-gd-obj.s b/test/MC/PowerPC/tls-gd-obj.s new file mode 100644 index 00000000000..63d47ee6293 --- /dev/null +++ b/test/MC/PowerPC/tls-gd-obj.s @@ -0,0 +1,56 @@ +// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck %s + +// Test correct relocation generation for thread-local storage using +// the general dynamic model and integrated assembly. + + + .file "/home/espindola/llvm/llvm/test/CodeGen/PowerPC/tls-gd-obj.ll" + .text + .globl main + .align 2 + .type main,@function + .section .opd,"aw",@progbits +main: # @main + .align 3 + .quad .L.main + .quad .TOC.@tocbase + .quad 0 + .text +.L.main: +# BB#0: # %entry + addis 3, 2, a@got@tlsgd@ha + addi 3, 3, a@got@tlsgd@l + li 4, 0 + bl __tls_get_addr(a@tlsgd) + nop + stw 4, -4(1) + lwz 4, 0(3) + extsw 3, 4 + blr + .long 0 + .quad 0 +.Ltmp0: + .size main, .Ltmp0-.L.main + + .type a,@object # @a + .section .tbss,"awT",@nobits + .globl a + .align 2 +a: + .long 0 # 0x0 + .size a, 4 + + +// Verify generation of R_PPC64_GOT_TLSGD16_HA, R_PPC64_GOT_TLSGD16_LO, +// and R_PPC64_TLSGD for accessing external variable a, and R_PPC64_REL24 +// for the call to __tls_get_addr. +// +// CHECK: Relocations [ +// CHECK: Section (2) .rela.text { +// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a +// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a +// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSGD a +// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr +// CHECK: } +// CHECK: ]