From: Chris Lattner <sabre@nondot.org>
Date: Tue, 13 Apr 2004 21:56:09 +0000 (+0000)
Subject: Implement a small optimization, which papers over the problem in
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=82c5a9990f4a156e24531faf1431079859e3cdb3;p=oota-llvm.git

Implement a small optimization, which papers over the problem in
X86/2004-04-13-FPCMOV-Crash.llx

A more robust fix is to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12935 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp
index 6958979cd36..775833c3d02 100644
--- a/lib/Target/X86/InstSelectSimple.cpp
+++ b/lib/Target/X86/InstSelectSimple.cpp
@@ -1038,7 +1038,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
       FalseVal = ConstantExpr::getCast(F, Type::ShortTy);
   }
 
-  
+  unsigned TrueReg  = getReg(TrueVal, MBB, IP);
+  unsigned FalseReg = getReg(FalseVal, MBB, IP);
+  if (TrueReg == FalseReg) {
+    static const unsigned Opcode[] = {
+      X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV, X86::MOV32rr
+    };
+    BuildMI(*MBB, IP, Opcode[SelectClass], 1, DestReg).addReg(TrueReg);
+    if (SelectClass == cLong)
+      BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(TrueReg+1);
+    return;
+  }
+
   unsigned Opcode;
   if (SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(Cond)) {
     // We successfully folded the setcc into the select instruction.
@@ -1130,8 +1141,6 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
     }
   }
 
-  unsigned TrueReg  = getReg(TrueVal, MBB, IP);
-  unsigned FalseReg = getReg(FalseVal, MBB, IP);
   unsigned RealDestReg = DestReg;
 
 
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index 6958979cd36..775833c3d02 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -1038,7 +1038,18 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
       FalseVal = ConstantExpr::getCast(F, Type::ShortTy);
   }
 
-  
+  unsigned TrueReg  = getReg(TrueVal, MBB, IP);
+  unsigned FalseReg = getReg(FalseVal, MBB, IP);
+  if (TrueReg == FalseReg) {
+    static const unsigned Opcode[] = {
+      X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV, X86::MOV32rr
+    };
+    BuildMI(*MBB, IP, Opcode[SelectClass], 1, DestReg).addReg(TrueReg);
+    if (SelectClass == cLong)
+      BuildMI(*MBB, IP, X86::MOV32rr, 1, DestReg+1).addReg(TrueReg+1);
+    return;
+  }
+
   unsigned Opcode;
   if (SetCondInst *SCI = canFoldSetCCIntoBranchOrSelect(Cond)) {
     // We successfully folded the setcc into the select instruction.
@@ -1130,8 +1141,6 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB,
     }
   }
 
-  unsigned TrueReg  = getReg(TrueVal, MBB, IP);
-  unsigned FalseReg = getReg(FalseVal, MBB, IP);
   unsigned RealDestReg = DestReg;