From: Chris Lattner Date: Thu, 21 Apr 2005 21:09:11 +0000 (+0000) Subject: Match another form of eqv X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=837a521c48b5bb481b61ba971092044cdbf0387f;p=oota-llvm.git Match another form of eqv git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21413 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 5d93774ab42..423eafe68f9 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1899,7 +1899,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { BuildMI(BB, PPC::EQV, 2, Result).addReg(Tmp1).addReg(Tmp2); return Result; } - // Check for NOT, NOR, and NAND: xor (copy, or, and), -1 + // Check for NOT, NOR, EQV, and NAND: xor (copy, or, xor, and), -1 if (N.getOperand(1).getOpcode() == ISD::Constant && cast(N.getOperand(1))->isAllOnesValue()) { switch(N.getOperand(0).getOpcode()) { @@ -1913,6 +1913,11 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { Tmp2 = SelectExpr(N.getOperand(0).getOperand(1)); BuildMI(BB, PPC::NAND, 2, Result).addReg(Tmp1).addReg(Tmp2); break; + case ISD::XOR: + Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); + Tmp2 = SelectExpr(N.getOperand(0).getOperand(1)); + BuildMI(BB, PPC::EQV, 2, Result).addReg(Tmp1).addReg(Tmp2); + break; default: Tmp1 = SelectExpr(N.getOperand(0)); BuildMI(BB, PPC::NOR, 2, Result).addReg(Tmp1).addReg(Tmp1);