From: Santosh Yaraganavi Date: Mon, 23 Apr 2012 13:22:11 +0000 (+0530) Subject: [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address) X-Git-Tag: firefly_0821_release~3680^2~2850^2~52 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=85bb4457ef47db81afef98f97de524199e139433;p=firefly-linux-kernel-4.4.55.git [SCSI] ufs: Assign UTRLBAU = upper_32_ bits(UTRLD base address) UTP Transfer request list base registers UTRLBA and UTRLBAU must be assigned, lower-32 and upper-32 bits of UTRLD list physical base addresses respectively. Currently UTRLBAU is being assigned lower-32 bits of UTRLD physical base address. This will cause an issue with controllers that can support 64-bit addressing. This patch correctly assigns upper-32 bits of UTRLD physical base address to UTRLBAU. Reported-by: Rene De Jong Signed-off-by: Santosh Yaraganavi Reviewed-by: Vinayak Holikatti Signed-off-by: James Bottomley --- diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 78be71cfc636..4e010b727818 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -1032,11 +1032,11 @@ static int ufshcd_initialize_hba(struct ufs_hba *hba) return -EIO; /* Configure UTRL and UTMRL base address registers */ - writel(hba->utrdl_dma_addr, - (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L)); writel(lower_32_bits(hba->utrdl_dma_addr), + (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_L)); + writel(upper_32_bits(hba->utrdl_dma_addr), (hba->mmio_base + REG_UTP_TRANSFER_REQ_LIST_BASE_H)); - writel(hba->utmrdl_dma_addr, + writel(lower_32_bits(hba->utmrdl_dma_addr), (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_L)); writel(upper_32_bits(hba->utmrdl_dma_addr), (hba->mmio_base + REG_UTP_TASK_REQ_LIST_BASE_H));