From: Bill Wendling <isanbard@gmail.com>
Date: Tue, 18 Oct 2011 22:52:20 +0000 (+0000)
Subject: Use the integer compare when the value is small enough. Use the "move into a
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=85f3a0a4c4c1953a06ea463c6b5d6b88d62b58b4;p=oota-llvm.git

Use the integer compare when the value is small enough. Use the "move into a
register and then compare against that" method when it's too large. We have to
move the value into the register in the "movw, movt" pair of instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142440 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 759d3b6e0d6..236ea6f90a7 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -5672,9 +5672,7 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
   MachineRegisterInfo *MRI = &MF->getRegInfo();
   ARMFunctionInfo *AFI = MF->getInfo<ARMFunctionInfo>();
   MachineFrameInfo *MFI = MF->getFrameInfo();
-  MachineConstantPool *MCP = MF->getConstantPool();
   int FI = MFI->getFunctionContextIndex();
-  const Function *F = MF->getFunction();
 
   const TargetRegisterClass *TRC =
     Subtarget->isThumb() ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass;
@@ -5863,6 +5861,23 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const {
                    .addImm(4)
                    .addMemOperand(FIMMOLd));
 
+    if (NumLPads < 256) {
+      AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri))
+                     .addReg(NewVReg1)
+                     .addImm(NumLPads));
+    } else {
+      unsigned VReg1 = MRI->createVirtualRegister(TRC);
+      AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1)
+                     .addImm(NumLPads & 0xFF));
+      unsigned VReg2 = MRI->createVirtualRegister(TRC);
+      AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2)
+                     .addReg(VReg1)
+                     .addImm(NumLPads >> 16));
+      AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr))
+                     .addReg(NewVReg1)
+                     .addReg(VReg2));
+    }
+
     unsigned NewVReg2 = MRI->createVirtualRegister(TRC);
     AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), NewVReg2)
                    .addImm(LPadList.size()));