From: Jason W Kim Date: Wed, 1 Dec 2010 02:40:06 +0000 (+0000) Subject: ARM/MC/ELF relocation "hello world" for movw/movt. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=85fed5e0c5bc010f967948a4af6b425a5a2f2bd0;p=oota-llvm.git ARM/MC/ELF relocation "hello world" for movw/movt. Lifted adjustFixupValue() from Darwin for sharing w ELF. Test added TODO: refactor ELFObjectWriter::RecordRelocation more. Possibly share more code with Darwin? Lots more relocations... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120534 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp index 4b978368ecf..47c70ec1cce 100644 --- a/lib/MC/ELFObjectWriter.cpp +++ b/lib/MC/ELFObjectWriter.cpp @@ -396,6 +396,10 @@ namespace { const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue); + protected: + // Fixme: pull up to ELFObjectWriter + unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup, + bool IsPCRel); private: static bool isFixupKindPCRel(unsigned Kind) { switch (Kind) { @@ -1434,13 +1438,105 @@ ARMELFObjectWriter::ARMELFObjectWriter(raw_ostream &_OS, bool _Is64Bit, ARMELFObjectWriter::~ARMELFObjectWriter() {} +unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target, + const MCFixup &Fixup, + bool IsPCRel) { + MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ? + MCSymbolRefExpr::VK_None : Target.getSymA()->getKind(); + + if (IsPCRel) { + switch (Modifier) { + default: assert(0 && "Unimplemented Modifier"); + case MCSymbolRefExpr::VK_None: break; + } + switch ((unsigned)Fixup.getKind()) { + default: assert(0 && "Unimplemented"); + case ARM::fixup_arm_branch: return ELF::R_ARM_CALL; break; + } + } else { + switch ((unsigned)Fixup.getKind()) { + default: llvm_unreachable("invalid fixup kind!"); + case ARM::fixup_arm_pcrel_12: + case ARM::fixup_arm_vfp_pcrel_12: + assert(0 && "Unimplemented"); break; + case ARM::fixup_arm_branch: + return ELF::R_ARM_CALL; break; + case ARM::fixup_arm_movt_hi16: + return ELF::R_ARM_MOVT_ABS; break; + case ARM::fixup_arm_movw_lo16: + return ELF::R_ARM_MOVW_ABS_NC; break; + } + } + + if (RelocNeedsGOT(Modifier)) + NeedsGOT = true; + return -1; +} + void ARMELFObjectWriter::RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { - assert(0 && "ARMELFObjectWriter::RecordRelocation() unimplemented"); + int64_t Addend = 0; + int Index = 0; + int64_t Value = Target.getConstant(); + const MCSymbol *RelocSymbol = NULL; + + bool IsPCRel = isFixupKindPCRel(Fixup.getKind()); + if (!Target.isAbsolute()) { + const MCSymbol &Symbol = Target.getSymA()->getSymbol(); + const MCSymbol &ASymbol = Symbol.AliasedSymbol(); + RelocSymbol = SymbolToReloc(Asm, Target, *Fragment); + + if (const MCSymbolRefExpr *RefB = Target.getSymB()) { + const MCSymbol &SymbolB = RefB->getSymbol(); + MCSymbolData &SDB = Asm.getSymbolData(SymbolB); + IsPCRel = true; + MCSectionData *Sec = Fragment->getParent(); + + // Offset of the symbol in the section + int64_t a = Layout.getSymbolAddress(&SDB) - Layout.getSectionAddress(Sec); + + // Ofeset of the relocation in the section + int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + Value += b - a; + } + + if (!RelocSymbol) { + MCSymbolData &SD = Asm.getSymbolData(ASymbol); + MCFragment *F = SD.getFragment(); + + Index = F->getParent()->getOrdinal() + 1; + + MCSectionData *FSD = F->getParent(); + // Offset of the symbol in the section + Value += Layout.getSymbolAddress(&SD) - Layout.getSectionAddress(FSD); + } else { + if (Asm.getSymbolData(Symbol).getFlags() & ELF_Other_Weakref) + WeakrefUsedInReloc.insert(RelocSymbol); + else + UsedInReloc.insert(RelocSymbol); + Index = -1; + } + Addend = Value; + // Compensate for the addend on i386. + if (Is64Bit) + Value = 0; + } + + FixedValue = Value; + + // determine the type of the relocation + unsigned Type = GetRelocType(Target, Fixup, IsPCRel); + + uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) + + Fixup.getOffset(); + + if (!HasRelocationAddend) Addend = 0; + ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend); + Relocations[Fragment->getParent()].push_back(ERE); } //===- MBlazeELFObjectWriter -------------------------------------------===// diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp index 6267a5af990..432d0774e76 100644 --- a/lib/Target/ARM/ARMAsmBackend.cpp +++ b/lib/Target/ARM/ARMAsmBackend.cpp @@ -38,6 +38,48 @@ public: unsigned getPointerSize() const { return 4; } + +protected: + static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { + switch (Kind) { + default: + llvm_unreachable("Unknown fixup kind!"); + case FK_Data_4: + case ARM::fixup_arm_movt_hi16: + case ARM::fixup_arm_movw_lo16: + return Value; + case ARM::fixup_arm_pcrel_12: { + bool isAdd = true; + // ARM PC-relative values are offset by 8. + Value -= 8; + if ((int64_t)Value < 0) { + Value = -Value; + isAdd = false; + } + assert ((Value < 4096) && "Out of range pc-relative fixup value!"); + Value |= isAdd << 23; + return Value; + } + case ARM::fixup_arm_branch: + // These values don't encode the low two bits since they're always zero. + // Offset by 8 just as above. + return (Value - 8) >> 2; + case ARM::fixup_arm_vfp_pcrel_12: { + // Offset by 8 just as above. + Value = Value - 8; + bool isAdd = true; + if ((int64_t)Value < 0) { + Value = -Value; + isAdd = false; + } + // These values don't encode the low two bits since they're always zero. + Value >>= 2; + assert ((Value < 256) && "Out of range pc-relative fixup value!"); + Value |= isAdd << 23; + return Value; + } + } + } }; } // end anonymous namespace @@ -52,10 +94,6 @@ void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const { } bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const { -// if ((Count % 4) != 0) { -// // Fixme: % 2 for Thumb? -// return false; -// } // FIXME: Zero fill for now. That's not right, but at least will get the // section size right. for (uint64_t i = 0; i != Count; ++i) @@ -94,7 +132,39 @@ public: // Fixme: can we raise this to share code between Darwin and ELF? void ELFARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, uint64_t Value) const { - assert(0 && "ELFARMAsmBackend::ApplyFixup() unimplemented"); + uint32_t Mask = 0; + // Fixme: 2 for Thumb + int NumBytes = 4; + Value = adjustFixupValue(Fixup.getKind(), Value); + + switch (Fixup.getKind()) { + default: assert(0 && "Unsupported Fixup kind"); break; + case ARM::fixup_arm_branch: { + unsigned Lo24 = Value & 0xFFFFFF; + Mask = ~(0xFFFFFF); + Value = Lo24; + }; break; + case ARM::fixup_arm_movt_hi16: + case ARM::fixup_arm_movw_lo16: { + unsigned Hi4 = (Value & 0xF000) >> 12; + unsigned Lo12 = Value & 0x0FFF; + // inst{19-16} = Hi4; + // inst{11-0} = Lo12; + Value = (Hi4 << 16) | (Lo12); + Mask = ~(0xF0FFF); + }; break; + } + + assert((Fixup.getOffset() % NumBytes == 0) + && "Offset mod NumBytes is nonzero!"); + // For each byte of the fragment that the fixup touches, mask in the + // bits from the fixup value. + // The Value has been "split up" into the appropriate bitfields above. + // Fixme: how to share code with the .td generated code? + for (unsigned i = 0; i != NumBytes; ++i) { + DF.getContents()[Fixup.getOffset() + i] &= uint8_t(Mask >> (i * 8)); + DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8)); + } } namespace { @@ -137,45 +207,6 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { } } -static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { - switch (Kind) { - default: - llvm_unreachable("Unknown fixup kind!"); - case FK_Data_4: - return Value; - case ARM::fixup_arm_pcrel_12: { - bool isAdd = true; - // ARM PC-relative values are offset by 8. - Value -= 8; - if ((int64_t)Value < 0) { - Value = -Value; - isAdd = false; - } - assert ((Value < 4096) && "Out of range pc-relative fixup value!"); - Value |= isAdd << 23; - return Value; - } - case ARM::fixup_arm_branch: - // These values don't encode the low two bits since they're always zero. - // Offset by 8 just as above. - return (Value - 8) >> 2; - case ARM::fixup_arm_vfp_pcrel_12: { - // Offset by 8 just as above. - Value = Value - 8; - bool isAdd = true; - if ((int64_t)Value < 0) { - Value = -Value; - isAdd = false; - } - // These values don't encode the low two bits since they're always zero. - Value >>= 2; - assert ((Value < 256) && "Out of range pc-relative fixup value!"); - Value |= isAdd << 23; - return Value; - } - } -} - void DarwinARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF, uint64_t Value) const { unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); diff --git a/test/CodeGen/ARM/2010-11-30-reloc-movt.ll b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll new file mode 100644 index 00000000000..a8dc52e411c --- /dev/null +++ b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll @@ -0,0 +1,42 @@ +; RUN: llc %s -mtriple=armv7-linux-gnueabi -arm-use-movt -filetype=obj -o - | \ +; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s + +target triple = "armv7-none-linux-gnueabi" + +@a = external global i8 + +define arm_aapcs_vfpcc i32 @barf() nounwind { +entry: + %0 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind + ret i32 %0 +; OBJ: '.text' +; OBJ-NEXT: 'sh_type' +; OBJ-NEXT: 'sh_flags' +; OBJ-NEXT: 'sh_addr' +; OBJ-NEXT: 'sh_offset' +; OBJ-NEXT: 'sh_size' +; OBJ-NEXT: 'sh_link' +; OBJ-NEXT: 'sh_info' +; OBJ-NEXT: 'sh_addralign' +; OBJ-NEXT: 'sh_entsize' +; OBJ-NEXT: '_section_data', '00482de9 000000e3 000040e3 feffffeb 0088bde8' + +; OBJ: Relocation 0x00000000 +; OBJ-NEXT: 'r_offset', 0x00000004 +; OBJ-NEXT: 'r_sym', 0x00000007 +; OBJ-NEXT: 'r_type', 0x0000002b + +; OBJ: Relocation 0x00000001 +; OBJ-NEXT: 'r_offset', 0x00000008 +; OBJ-NEXT: 'r_sym' +; OBJ-NEXT: 'r_type', 0x0000002c + +; OBJ: # Relocation 0x00000002 +; OBJ-NEXT: 'r_offset', 0x0000000c +; OBJ-NEXT: 'r_sym', 0x00000008 +; OBJ-NEXT: 'r_type', 0x0000001c + +} + +declare arm_aapcs_vfpcc i32 @foo(i8*) +