From: Ahmed Bougacha <ahmed.bougacha@gmail.com>
Date: Fri, 6 Feb 2015 23:15:39 +0000 (+0000)
Subject: [AArch64] Use the source location of the IR branch when creating Bcc
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8650883afb3d51dd787881f12b4c3f514d6c416a;p=oota-llvm.git

[AArch64] Use the source location of the IR branch when creating Bcc
from a conditional branch fed by an add/sub/mul-with-overflow node.

We previously used the SDLoc of the overflow node, for no good reason.
In some cases, this led to the Bcc and B terminators having different
source orders, and DBG_VALUEs being inserted between them.

The real issue is with the code that can't handle DBG_VALUEs between
terminators: the few places affected by this will be fixed soon.
In the meantime, fixing the SDLoc is a positive change no matter what.

No tests, as I have no idea how to get .loc emitted for branches?

rdar://19347133


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228463 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp
index 37fe7714dd3..3dd99984bd9 100644
--- a/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3263,8 +3263,8 @@ SDValue AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
       OFCC = getInvertedCondCode(OFCC);
     SDValue CCVal = DAG.getConstant(OFCC, MVT::i32);
 
-    return DAG.getNode(AArch64ISD::BRCOND, SDLoc(LHS), MVT::Other, Chain, Dest,
-                       CCVal, Overflow);
+    return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal,
+                       Overflow);
   }
 
   if (LHS.getValueType().isInteger()) {