From: dkl <dkl@rock-chips.com>
Date: Wed, 19 Mar 2014 13:36:55 +0000 (+0800)
Subject: rk3288: add more clock init
X-Git-Tag: firefly_0821_release~5991
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=88c5ecc9c661219e748428d7b544463753e947f7;p=firefly-linux-kernel-4.4.55.git

rk3288: add more clock init
---

diff --git a/arch/arm/boot/dts/rk3288-clocks.dtsi b/arch/arm/boot/dts/rk3288-clocks.dtsi
index b8586b1c5faf..9e93daafcfc4 100644
--- a/arch/arm/boot/dts/rk3288-clocks.dtsi
+++ b/arch/arm/boot/dts/rk3288-clocks.dtsi
@@ -545,6 +545,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_isp";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					clk_isp_jpe_div: clk_isp_jpe_div {
@@ -564,6 +565,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_isp_jpe";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
@@ -1014,6 +1016,7 @@
 						rockchip,clkops-idx =
 							<CLKOPS_RATE_MAC_REF>;
 						rockchip,flags = <CLK_SET_RATE_PARENT>;
+						#clock-init-cells = <1>;
 					};
 
 					/* reg[7:5]: reserved */
@@ -1295,6 +1298,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_edp";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					hclk_vio: hclk_vio_div {
@@ -1403,6 +1407,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>;
 						clock-output-names = "aclk_rga";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					clk_rga_div: clk_rga_div {
@@ -1424,6 +1429,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>;
 						clock-output-names = "clk_rga";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
@@ -1503,6 +1509,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>;
 						clock-output-names = "clk_vepu";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					clk_vdpu_div: clk_vdpu_div {
@@ -1524,6 +1531,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>;
 						clock-output-names = "clk_vdpu";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
@@ -1631,6 +1639,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_tsp";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					clk_tspout_div: clk_tspout_div {
@@ -1652,6 +1661,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&io_27m_in>;
 						clock-output-names = "clk_tspout";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
@@ -1844,6 +1854,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "aclk_hevc";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
@@ -1882,6 +1893,7 @@
 						clock-output-names = "hclk_hevc";
 						rockchip,div-type = <CLK_DIVIDER_PLUS_ONE>;
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					/* reg[15:14]: reserved */
@@ -1930,6 +1942,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_hevc_cabac";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 
 					clk_hevc_core_div: clk_hevc_core_div {
@@ -1951,6 +1964,7 @@
 						clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>;
 						clock-output-names = "clk_hevc_core";
 						#clock-cells = <0>;
+						#clock-init-cells = <1>;
 					};
 				};
 
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 190015c29ef3..e7e0af21ac6d 100755
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -452,7 +452,12 @@
 			<&aclk_vio1 300000000>,	<&hclk_vio 75000000>,
 			<&pclk_pd_alive 100000000>,	<&pclk_pd_pmu 100000000>,
 			<&aclk_hevc 400000000>,	<&hclk_hevc 200000000>,
-			<&clk_hevc_cabac 300000000>, <&clk_hevc_core 300000000>;
+			<&clk_hevc_cabac 300000000>, <&clk_hevc_core 300000000>,
+			<&aclk_rga 300000000>, <&clk_rga 300000000>,
+			<&clk_vepu 300000000>, <&clk_vdpu 300000000>,
+			<&clk_edp 200000000>, <&clk_isp 200000000>,
+			<&clk_isp_jpe 400000000>, <&clk_tsp 80000000>,
+			<&clk_tspout 80000000>, <&clk_mac 50000000>;
 	};
 
 	i2c0: i2c@ff650000 {