From: Yakir Yang <ykk@rock-chips.com>
Date: Sat, 16 Jul 2016 08:42:32 +0000 (+0800)
Subject: CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Protect against > 2GHz pixel clocks
X-Git-Tag: firefly_0821_release~2131
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8974d5e9bdfa350d563ff9805966466084da4a3b;p=firefly-linux-kernel-4.4.55.git

CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Protect against > 2GHz pixel clocks

Add a check just to make sure that someone doesn't try to give us a
pixel clock that is > 2GHz.  If they did that, some of our math might
overflow, so it's good to make sure we don't do it.

Change-Id: I451602f0d771bb16b399b43e376e1054b7ee060f
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/284642
Reviewed-by: Alexandru Stan <amstan@chromium.org>
---

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 23a610e4b31e..1e500e76e608 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -243,6 +243,14 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector,
 	int num_rates = ARRAY_SIZE(dw_hdmi_rates);
 	int i;
 
+	/*
+	 * Pixel clocks we support are always < 2GHz and so fit in an
+	 * int.  We should make sure source rate does too so we don't get
+	 * overflow when we multiply by 1000.
+	 */
+	if (mode->clock > INT_MAX / 1000)
+		return MODE_BAD;
+
 	for (i = 0; i < num_rates; i++) {
 		int slop = CLK_SLOP(pclk);