From: Duncan P. N. Exon Smith Date: Wed, 30 Jul 2014 17:11:27 +0000 (+0000) Subject: Rename llvm-uselistorder => verify-uselistorder X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=89c4197256acd0fa340aa9657f167152f8c3f7be;p=oota-llvm.git Rename llvm-uselistorder => verify-uselistorder git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214318 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll index e1e2d7dc544..461a92a84a1 100644 --- a/test/Bitcode/2006-12-11-Cast-ConstExpr.ll +++ b/test/Bitcode/2006-12-11-Cast-ConstExpr.ll @@ -1,7 +1,7 @@ ; This test ensures that we get a bitcast constant expression in and out, ; not a sitofp constant expression. ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; CHECK: bitcast ( @G = external global i32 diff --git a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll index a321ce21311..16f7e9ab9ae 100644 --- a/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll +++ b/test/Bitcode/2009-06-11-FirstClassAggregateConstant.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; PR4373 @foo = weak global { i32 } zeroinitializer diff --git a/test/Bitcode/aggregateInstructions.3.2.ll b/test/Bitcode/aggregateInstructions.3.2.ll index 4d35be08bd1..2853823f1c9 100644 --- a/test/Bitcode/aggregateInstructions.3.2.ll +++ b/test/Bitcode/aggregateInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread instructions with aggregate operands diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll index fba518fe7f7..c1eba948b6b 100644 --- a/test/Bitcode/arm32_neon_vcnt_upgrade.ll +++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; Tests vclz and vcnt define <4 x i16> @vclz16(<4 x i16>* %A) nounwind { diff --git a/test/Bitcode/atomic.ll b/test/Bitcode/atomic.ll index 448219a59cb..bccb868653c 100644 --- a/test/Bitcode/atomic.ll +++ b/test/Bitcode/atomic.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as %s -o - | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) { cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst diff --git a/test/Bitcode/attributes-3.3.ll b/test/Bitcode/attributes-3.3.ll index 7b44938a3e8..359d7ce3875 100644 --- a/test/Bitcode/attributes-3.3.ll +++ b/test/Bitcode/attributes-3.3.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; attributes-3.3.ll.bc was generated by passing this file to llvm-as-3.3. ; The test checks that LLVM does not silently misread attributes of diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll index 0fe66f5ad82..8286e396adf 100644 --- a/test/Bitcode/attributes.ll +++ b/test/Bitcode/attributes.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; PR12696 define void @f1(i8 zeroext) diff --git a/test/Bitcode/binaryFloatInstructions.3.2.ll b/test/Bitcode/binaryFloatInstructions.3.2.ll index a0010e03834..4df57109435 100644 --- a/test/Bitcode/binaryFloatInstructions.3.2.ll +++ b/test/Bitcode/binaryFloatInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; BinaryFloatOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread binary float instructions from diff --git a/test/Bitcode/binaryIntInstructions.3.2.ll b/test/Bitcode/binaryIntInstructions.3.2.ll index bcf3d5882e0..4559b4f4526 100644 --- a/test/Bitcode/binaryIntInstructions.3.2.ll +++ b/test/Bitcode/binaryIntInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread binary integer instructions from diff --git a/test/Bitcode/bitwiseInstructions.3.2.ll b/test/Bitcode/bitwiseInstructions.3.2.ll index 780f0447a52..f6d46577d97 100644 --- a/test/Bitcode/bitwiseInstructions.3.2.ll +++ b/test/Bitcode/bitwiseInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; bitwiseOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread bitwise instructions from diff --git a/test/Bitcode/calling-conventions.3.2.ll b/test/Bitcode/calling-conventions.3.2.ll index 6a497dc8d5a..e1f16349499 100644 --- a/test/Bitcode/calling-conventions.3.2.ll +++ b/test/Bitcode/calling-conventions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; calling-conventions.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread calling conventions of diff --git a/test/Bitcode/case-ranges-3.3.ll b/test/Bitcode/case-ranges-3.3.ll index 1198f2bb2cb..eaab6ec5823 100644 --- a/test/Bitcode/case-ranges-3.3.ll +++ b/test/Bitcode/case-ranges-3.3.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3 ; release of LLVM. This tests that the bitcode for switches from that release diff --git a/test/Bitcode/cmpxchg-upgrade.ll b/test/Bitcode/cmpxchg-upgrade.ll index 94f0eef455e..2a69ec5db5b 100644 --- a/test/Bitcode/cmpxchg-upgrade.ll +++ b/test/Bitcode/cmpxchg-upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just ; before the IR change on this file. diff --git a/test/Bitcode/conversionInstructions.3.2.ll b/test/Bitcode/conversionInstructions.3.2.ll index 9f8204821d4..550d44349e7 100644 --- a/test/Bitcode/conversionInstructions.3.2.ll +++ b/test/Bitcode/conversionInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; conversionOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread conversion instructions from diff --git a/test/Bitcode/drop-debug-info.ll b/test/Bitcode/drop-debug-info.ll index b3073e0d6c8..ee860115a83 100644 --- a/test/Bitcode/drop-debug-info.ll +++ b/test/Bitcode/drop-debug-info.ll @@ -1,6 +1,6 @@ ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s ; RUN: llvm-dis < %t.bc | FileCheck %s -; RUN: llvm-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %t.bc -preserve-bc-use-list-order -num-shuffles=5 define i32 @main() { entry: diff --git a/test/Bitcode/extractelement.ll b/test/Bitcode/extractelement.ll index 29f5b029200..ba806a4e3f2 100644 --- a/test/Bitcode/extractelement.ll +++ b/test/Bitcode/extractelement.ll @@ -1,5 +1,5 @@ ; RUN: opt < %s -constprop | llvm-dis -disable-output -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; PR3465 define double @test() { diff --git a/test/Bitcode/flags.ll b/test/Bitcode/flags.ll index 3760a44bd6f..a996a8a8f8d 100644 --- a/test/Bitcode/flags.ll +++ b/test/Bitcode/flags.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llvm-dis > %t0 ; RUN: opt -S < %s > %t1 ; RUN: diff %t0 %t1 -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; PR6140 ; Make sure the flags are serialized/deserialized properly for both diff --git a/test/Bitcode/function-encoding-rel-operands.ll b/test/Bitcode/function-encoding-rel-operands.ll index cc2f6aef5e5..14aa01fc1d9 100644 --- a/test/Bitcode/function-encoding-rel-operands.ll +++ b/test/Bitcode/function-encoding-rel-operands.ll @@ -1,7 +1,7 @@ ; Basic sanity test to check that instruction operands are encoded with ; relative IDs. ; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; CHECK: FUNCTION_BLOCK ; CHECK: INST_BINOP {{.*}}op0=1 op1=1 diff --git a/test/Bitcode/global-variables.3.2.ll b/test/Bitcode/global-variables.3.2.ll index 4a856f199e5..cbba464a298 100644 --- a/test/Bitcode/global-variables.3.2.ll +++ b/test/Bitcode/global-variables.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; global-variables.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread global variables attributes of diff --git a/test/Bitcode/inalloca.ll b/test/Bitcode/inalloca.ll index 445b4a282bf..386a476b455 100644 --- a/test/Bitcode/inalloca.ll +++ b/test/Bitcode/inalloca.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; inalloca should roundtrip. diff --git a/test/Bitcode/linkage-types-3.2.ll b/test/Bitcode/linkage-types-3.2.ll index 01b195f6c51..06e81b949f1 100644 --- a/test/Bitcode/linkage-types-3.2.ll +++ b/test/Bitcode/linkage-types-3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; linkage-types-3.2.ll.bc was generated by passing this file to llvm-as-3.2 ; The test checks that LLVM does not silently misread linkage types of diff --git a/test/Bitcode/local-linkage-default-visibility.3.4.ll b/test/Bitcode/local-linkage-default-visibility.3.4.ll index c1a9fbefe69..f72fd1578e8 100644 --- a/test/Bitcode/local-linkage-default-visibility.3.4.ll +++ b/test/Bitcode/local-linkage-default-visibility.3.4.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; local-linkage-default-visibility.3.4.ll.bc was generated by passing this file ; to llvm-as-3.4. The test checks that LLVM upgrades visibility of symbols diff --git a/test/Bitcode/memInstructions.3.2.ll b/test/Bitcode/memInstructions.3.2.ll index a8073225a69..67d24f41a10 100644 --- a/test/Bitcode/memInstructions.3.2.ll +++ b/test/Bitcode/memInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread memory related instructions of diff --git a/test/Bitcode/metadata.ll b/test/Bitcode/metadata.ll index a3550bcacec..1ceb606dd18 100644 --- a/test/Bitcode/metadata.ll +++ b/test/Bitcode/metadata.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 !llvm.foo = !{!0} !0 = metadata !{i32 42} diff --git a/test/Bitcode/old-aliases.ll b/test/Bitcode/old-aliases.ll index 13b6d3efa23..b32bc1b18cd 100644 --- a/test/Bitcode/old-aliases.ll +++ b/test/Bitcode/old-aliases.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; old-aliases.bc consist of this file assembled with an old llvm-as (3.5 trunk) ; from when aliases contained a ConstantExpr. diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll index c0ded8b622c..ff284814189 100644 --- a/test/Bitcode/ptest-new.ll +++ b/test/Bitcode/ptest-new.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 define i32 @foo(<2 x i64> %bar) nounwind { entry: diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll index c6c160539c2..5f252aabf73 100644 --- a/test/Bitcode/ptest-old.ll +++ b/test/Bitcode/ptest-old.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 define i32 @foo(<4 x float> %bar) nounwind { entry: diff --git a/test/Bitcode/select.ll b/test/Bitcode/select.ll index 3da53857870..a33926c2829 100644 --- a/test/Bitcode/select.ll +++ b/test/Bitcode/select.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 define <2 x i32> @main() { ret <2 x i32> select (<2 x i1> , <2 x i32> zeroinitializer, <2 x i32> ) diff --git a/test/Bitcode/shuffle.ll b/test/Bitcode/shuffle.ll index 65bde6765c2..5b0e9e70e44 100644 --- a/test/Bitcode/shuffle.ll +++ b/test/Bitcode/shuffle.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis -disable-output -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; ; tests the bitcodereader can handle the case where the reader will initially diff --git a/test/Bitcode/tailcall.ll b/test/Bitcode/tailcall.ll index ea47df62011..5eed7a39574 100644 --- a/test/Bitcode/tailcall.ll +++ b/test/Bitcode/tailcall.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; Check that musttail and tail roundtrip. diff --git a/test/Bitcode/terminatorInstructions.3.2.ll b/test/Bitcode/terminatorInstructions.3.2.ll index d9e51a5996e..a2285a13871 100644 --- a/test/Bitcode/terminatorInstructions.3.2.ll +++ b/test/Bitcode/terminatorInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread terminator instructions from diff --git a/test/Bitcode/upgrade-global-ctors.ll b/test/Bitcode/upgrade-global-ctors.ll index f75b28b7db1..b01c7520c95 100644 --- a/test/Bitcode/upgrade-global-ctors.ll +++ b/test/Bitcode/upgrade-global-ctors.ll @@ -1,4 +1,4 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; CHECK: @llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer diff --git a/test/Bitcode/upgrade-loop-metadata.ll b/test/Bitcode/upgrade-loop-metadata.ll index 5c18bd930cc..3c1db98273a 100644 --- a/test/Bitcode/upgrade-loop-metadata.ll +++ b/test/Bitcode/upgrade-loop-metadata.ll @@ -1,7 +1,7 @@ ; Test to make sure loop vectorizer metadata is automatically upgraded. ; ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 define void @_Z28loop_with_vectorize_metadatav() { entry: diff --git a/test/Bitcode/upgrade-tbaa.ll b/test/Bitcode/upgrade-tbaa.ll index 0d88fa6ce3a..8dd3b695a67 100644 --- a/test/Bitcode/upgrade-tbaa.ll +++ b/test/Bitcode/upgrade-tbaa.ll @@ -1,5 +1,5 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 ; Function Attrs: nounwind define void @_Z4testPiPf(i32* nocapture %pI, float* nocapture %pF) #0 { diff --git a/test/Bitcode/use-list-order.ll b/test/Bitcode/use-list-order.ll index 33cc13edb05..bb71a8586b7 100644 --- a/test/Bitcode/use-list-order.ll +++ b/test/Bitcode/use-list-order.ll @@ -1,4 +1,4 @@ -; RUN: llvm-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s -preserve-bc-use-list-order -num-shuffles=5 @a = global [4 x i1] [i1 0, i1 1, i1 0, i1 1] @b = alias i1* getelementptr ([4 x i1]* @a, i64 0, i64 2) diff --git a/test/Bitcode/vectorInstructions.3.2.ll b/test/Bitcode/vectorInstructions.3.2.ll index 5b983ac0f02..4daae418722 100644 --- a/test/Bitcode/vectorInstructions.3.2.ll +++ b/test/Bitcode/vectorInstructions.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; vectorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not misread vector operations of diff --git a/test/Bitcode/visibility-styles.3.2.ll b/test/Bitcode/visibility-styles.3.2.ll index cccc9509e67..aecbc6562cd 100644 --- a/test/Bitcode/visibility-styles.3.2.ll +++ b/test/Bitcode/visibility-styles.3.2.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc| FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; visibility-styles.3.2.ll.bc was generated by passing this file to llvm-as-3.2. ; The test checks that LLVM does not silently misread visibility styles of diff --git a/test/Bitcode/weak-cmpxchg-upgrade.ll b/test/Bitcode/weak-cmpxchg-upgrade.ll index fd543c4a968..a09efc70992 100644 --- a/test/Bitcode/weak-cmpxchg-upgrade.ll +++ b/test/Bitcode/weak-cmpxchg-upgrade.ll @@ -1,5 +1,5 @@ ; RUN: llvm-dis < %s.bc | FileCheck %s -; RUN: llvm-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 +; RUN: verify-uselistorder < %s.bc -preserve-bc-use-list-order -num-shuffles=5 ; cmpxchg-upgrade.ll.bc was produced by running a version of llvm-as from just ; before the IR change on this file. diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 59a17b19506..2b3a618a3ae 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -44,7 +44,6 @@ set(LLVM_TEST_DEPENDS llvm-rtdyld llvm-symbolizer llvm-tblgen - llvm-uselistorder llvm-vtabledump macho-dump opt @@ -53,6 +52,7 @@ set(LLVM_TEST_DEPENDS not yaml2obj obj2yaml + verify-uselistorder ) # If Intel JIT events are supported, depend on a tool that tests the listener. diff --git a/test/lit.cfg b/test/lit.cfg index 6f2632cba5d..b5a982c02d5 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -228,7 +228,6 @@ for pattern in [r"\bbugpoint\b(?!-)", r"\bllvm-rtdyld\b", r"\bllvm-size\b", r"\bllvm-tblgen\b", - r"\bllvm-uselistorder\b", r"\bllvm-vtabledump\b", r"\bllvm-c-test\b", r"\bmacho-dump\b", @@ -236,6 +235,7 @@ for pattern in [r"\bbugpoint\b(?!-)", r"\bFileCheck\b", r"\bobj2yaml\b", r"\byaml2obj\b", + r"\bverify-uselistorder\b", # Handle these specially as they are strings searched # for during testing. r"\| \bcount\b", diff --git a/tools/CMakeLists.txt b/tools/CMakeLists.txt index ef8095b688e..940f656b598 100644 --- a/tools/CMakeLists.txt +++ b/tools/CMakeLists.txt @@ -43,7 +43,7 @@ add_llvm_tool_subdirectory(llvm-bcanalyzer) add_llvm_tool_subdirectory(llvm-stress) add_llvm_tool_subdirectory(llvm-mcmarkup) -add_llvm_tool_subdirectory(llvm-uselistorder) +add_llvm_tool_subdirectory(verify-uselistorder) add_llvm_tool_subdirectory(llvm-symbolizer) diff --git a/tools/LLVMBuild.txt b/tools/LLVMBuild.txt index 92c7d2b4094..13a08b2d449 100644 --- a/tools/LLVMBuild.txt +++ b/tools/LLVMBuild.txt @@ -16,7 +16,7 @@ ;===------------------------------------------------------------------------===; [common] -subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup llvm-uselistorder +subdirectories = bugpoint llc lli llvm-ar llvm-as llvm-bcanalyzer llvm-cov llvm-diff llvm-dis llvm-dwarfdump llvm-extract llvm-jitlistener llvm-link llvm-lto llvm-mc llvm-nm llvm-objdump llvm-profdata llvm-rtdyld llvm-size macho-dump opt llvm-mcmarkup verify-uselistorder [component_0] type = Group diff --git a/tools/Makefile b/tools/Makefile index ed7773d61fa..9ba4608ecad 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -32,7 +32,7 @@ PARALLEL_DIRS := opt llvm-as llvm-dis llc llvm-ar llvm-nm llvm-link \ macho-dump llvm-objdump llvm-readobj llvm-rtdyld \ llvm-dwarfdump llvm-cov llvm-size llvm-stress llvm-mcmarkup \ llvm-profdata llvm-symbolizer obj2yaml yaml2obj llvm-c-test \ - llvm-vtabledump llvm-uselistorder + llvm-vtabledump verify-uselistorder # If Intel JIT Events support is configured, build an extra tool to test it. ifeq ($(USE_INTEL_JITEVENTS), 1) diff --git a/tools/llvm-uselistorder/CMakeLists.txt b/tools/llvm-uselistorder/CMakeLists.txt deleted file mode 100644 index c08f8c37c46..00000000000 --- a/tools/llvm-uselistorder/CMakeLists.txt +++ /dev/null @@ -1,12 +0,0 @@ -set(LLVM_LINK_COMPONENTS - AsmParser - BitReader - BitWriter - Core - IRReader - Support - ) - -add_llvm_tool(llvm-uselistorder - llvm-uselistorder.cpp - ) diff --git a/tools/llvm-uselistorder/LLVMBuild.txt b/tools/llvm-uselistorder/LLVMBuild.txt deleted file mode 100644 index b9d6f10b89e..00000000000 --- a/tools/llvm-uselistorder/LLVMBuild.txt +++ /dev/null @@ -1,22 +0,0 @@ -;===- ./tools/llvm-uselistorder/LLVMBuild.txt ------------------*- Conf -*--===; -; -; The LLVM Compiler Infrastructure -; -; This file is distributed under the University of Illinois Open Source -; License. See LICENSE.TXT for details. -; -;===------------------------------------------------------------------------===; -; -; This is an LLVMBuild description file for the components in this subdirectory. -; -; For more information on the LLVMBuild system, please see: -; -; http://llvm.org/docs/LLVMBuild.html -; -;===------------------------------------------------------------------------===; - -[component_0] -type = Tool -name = llvm-uselistorder -parent = Tools -required_libraries = IRReader BitWriter Support diff --git a/tools/llvm-uselistorder/Makefile b/tools/llvm-uselistorder/Makefile deleted file mode 100644 index 5a3727e52d2..00000000000 --- a/tools/llvm-uselistorder/Makefile +++ /dev/null @@ -1,17 +0,0 @@ -##===- tools/llvm-uselistorder/Makefile --------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL := ../.. -TOOLNAME := llvm-uselistorder -LINK_COMPONENTS := AsmParser BitReader BitWriter Core IRReader Support - -# This tool has no plugins, optimize startup time. -TOOL_NO_EXPORTS := 1 - -include $(LEVEL)/Makefile.common diff --git a/tools/llvm-uselistorder/llvm-uselistorder.cpp b/tools/llvm-uselistorder/llvm-uselistorder.cpp deleted file mode 100644 index 0f817d2bf38..00000000000 --- a/tools/llvm-uselistorder/llvm-uselistorder.cpp +++ /dev/null @@ -1,394 +0,0 @@ -//===- llvm-uselistorder.cpp - The LLVM Modular Optimizer -----------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// Verify that use-list order can be serialized correctly. After reading the -// provided IR, this tool shuffles the use-lists and then writes and reads to a -// separate Module whose use-list orders are compared to the original. -// -//===----------------------------------------------------------------------===// - -#include "llvm/ADT/DenseMap.h" -#include "llvm/AsmParser/Parser.h" -#include "llvm/Bitcode/ReaderWriter.h" -#include "llvm/IR/LLVMContext.h" -#include "llvm/IR/Module.h" -#include "llvm/IR/UseListOrder.h" -#include "llvm/IRReader/IRReader.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/FileSystem.h" -#include "llvm/Support/FileUtilities.h" -#include "llvm/Support/ManagedStatic.h" -#include "llvm/Support/MemoryBuffer.h" -#include "llvm/Support/PrettyStackTrace.h" -#include "llvm/Support/Signals.h" -#include "llvm/Support/SourceMgr.h" -#include "llvm/Support/SystemUtils.h" - -using namespace llvm; - -#define DEBUG_TYPE "use-list-order" - -static cl::opt InputFilename(cl::Positional, - cl::desc(""), - cl::init("-"), - cl::value_desc("filename")); - -static cl::opt SaveTemps("save-temps", cl::desc("Save temp files"), - cl::init(false)); - -static cl::opt - NumShuffles("num-shuffles", - cl::desc("Number of times to shuffle and verify use-lists"), - cl::init(1)); - -namespace { - -struct TempFile { - std::string Filename; - FileRemover Remover; - bool init(const std::string &Ext); - bool writeBitcode(const Module &M) const; - bool writeAssembly(const Module &M) const; - std::unique_ptr readBitcode(LLVMContext &Context) const; - std::unique_ptr readAssembly(LLVMContext &Context) const; -}; - -struct ValueMapping { - DenseMap IDs; - std::vector Values; - - /// \brief Construct a value mapping for module. - /// - /// Creates mapping from every value in \c M to an ID. This mapping includes - /// un-referencable values. - /// - /// Every \a Value that gets serialized in some way should be represented - /// here. The order needs to be deterministic, but it's unnecessary to match - /// the value-ids in the bitcode writer. - /// - /// All constants that are referenced by other values are included in the - /// mapping, but others -- which wouldn't be serialized -- are not. - ValueMapping(const Module &M); - - /// \brief Map a value. - /// - /// Maps a value. If it's a constant, maps all of its operands first. - void map(const Value *V); - unsigned lookup(const Value *V) const { return IDs.lookup(V); } -}; - -} // end namespace - -bool TempFile::init(const std::string &Ext) { - SmallVector Vector; - DEBUG(dbgs() << " - create-temp-file\n"); - if (auto EC = sys::fs::createTemporaryFile("use-list-order", Ext, Vector)) { - (void)EC; - DEBUG(dbgs() << "error: " << EC.message() << "\n"); - return true; - } - assert(!Vector.empty()); - - Filename.assign(Vector.data(), Vector.data() + Vector.size()); - Remover.setFile(Filename, !SaveTemps); - DEBUG(dbgs() << " - filename = " << Filename << "\n"); - return false; -} - -bool TempFile::writeBitcode(const Module &M) const { - DEBUG(dbgs() << " - write bitcode\n"); - std::string ErrorInfo; - raw_fd_ostream OS(Filename.c_str(), ErrorInfo, sys::fs::F_None); - if (!ErrorInfo.empty()) { - DEBUG(dbgs() << "error: " << ErrorInfo << "\n"); - return true; - } - - WriteBitcodeToFile(&M, OS); - return false; -} - -bool TempFile::writeAssembly(const Module &M) const { - DEBUG(dbgs() << " - write assembly\n"); - std::string ErrorInfo; - raw_fd_ostream OS(Filename.c_str(), ErrorInfo, sys::fs::F_Text); - if (!ErrorInfo.empty()) { - DEBUG(dbgs() << "error: " << ErrorInfo << "\n"); - return true; - } - - OS << M; - return false; -} - -std::unique_ptr TempFile::readBitcode(LLVMContext &Context) const { - DEBUG(dbgs() << " - read bitcode\n"); - ErrorOr> BufferOr = - MemoryBuffer::getFile(Filename); - if (!BufferOr) { - DEBUG(dbgs() << "error: " << BufferOr.getError().message() << "\n"); - return nullptr; - } - - std::unique_ptr Buffer = std::move(BufferOr.get()); - ErrorOr ModuleOr = parseBitcodeFile(Buffer.get(), Context); - if (!ModuleOr) { - DEBUG(dbgs() << "error: " << ModuleOr.getError().message() << "\n"); - return nullptr; - } - return std::unique_ptr(ModuleOr.get()); -} - -std::unique_ptr TempFile::readAssembly(LLVMContext &Context) const { - DEBUG(dbgs() << " - read assembly\n"); - SMDiagnostic Err; - std::unique_ptr M(ParseAssemblyFile(Filename, Err, Context)); - if (!M.get()) - DEBUG(dbgs() << "error: "; Err.print("verify-use-list-order", dbgs())); - return M; -} - -ValueMapping::ValueMapping(const Module &M) { - // Every value should be mapped, including things like void instructions and - // basic blocks that are kept out of the ValueEnumerator. - // - // The current mapping order makes it easier to debug the tables. It happens - // to be similar to the ID mapping when writing ValueEnumerator, but they - // aren't (and needn't be) in sync. - - // Globals. - for (const GlobalVariable &G : M.globals()) - map(&G); - for (const GlobalAlias &A : M.aliases()) - map(&A); - for (const Function &F : M) - map(&F); - - // Constants used by globals. - for (const GlobalVariable &G : M.globals()) - if (G.hasInitializer()) - map(G.getInitializer()); - for (const GlobalAlias &A : M.aliases()) - map(A.getAliasee()); - for (const Function &F : M) - if (F.hasPrefixData()) - map(F.getPrefixData()); - - // Function bodies. - for (const Function &F : M) { - for (const Argument &A : F.args()) - map(&A); - for (const BasicBlock &BB : F) - map(&BB); - for (const BasicBlock &BB : F) - for (const Instruction &I : BB) - map(&I); - - // Constants used by instructions. - for (const BasicBlock &BB : F) - for (const Instruction &I : BB) - for (const Value *Op : I.operands()) - if ((isa(Op) && !isa(*Op)) || - isa(Op)) - map(Op); - } -} - -void ValueMapping::map(const Value *V) { - if (IDs.lookup(V)) - return; - - if (auto *C = dyn_cast(V)) - if (!isa(C)) - for (const Value *Op : C->operands()) - map(Op); - - Values.push_back(V); - IDs[V] = Values.size(); -} - -#ifndef NDEBUG -static void dumpMapping(const ValueMapping &VM) { - dbgs() << "value-mapping (size = " << VM.Values.size() << "):\n"; - for (unsigned I = 0, E = VM.Values.size(); I != E; ++I) { - dbgs() << " - id = " << I << ", value = "; - VM.Values[I]->dump(); - } -} - -static void debugValue(const ValueMapping &M, unsigned I, StringRef Desc) { - const Value *V = M.Values[I]; - dbgs() << " - " << Desc << " value = "; - V->dump(); - for (const Use &U : V->uses()) { - dbgs() << " => use: op = " << U.getOperandNo() - << ", user-id = " << M.IDs.lookup(U.getUser()) << ", user = "; - U.getUser()->dump(); - } -} - -static void debugUserMismatch(const ValueMapping &L, const ValueMapping &R, - unsigned I) { - dbgs() << " - fail: user mismatch: ID = " << I << "\n"; - debugValue(L, I, "LHS"); - debugValue(R, I, "RHS"); - - dbgs() << "\nlhs-"; - dumpMapping(L); - dbgs() << "\nrhs-"; - dumpMapping(R); -} - -static void debugSizeMismatch(const ValueMapping &L, const ValueMapping &R) { - dbgs() << " - fail: map size: " << L.Values.size() - << " != " << R.Values.size() << "\n"; - dbgs() << "\nlhs-"; - dumpMapping(L); - dbgs() << "\nrhs-"; - dumpMapping(R); -} -#endif - -static bool matches(const ValueMapping &LM, const ValueMapping &RM) { - DEBUG(dbgs() << "compare value maps\n"); - if (LM.Values.size() != RM.Values.size()) { - DEBUG(debugSizeMismatch(LM, RM)); - return false; - } - - // This mapping doesn't include dangling constant users, since those don't - // get serialized. However, checking if users are constant and calling - // isConstantUsed() on every one is very expensive. Instead, just check if - // the user is mapped. - auto skipUnmappedUsers = - [&](Value::const_use_iterator &U, Value::const_use_iterator E, - const ValueMapping &M) { - while (U != E && !M.lookup(U->getUser())) - ++U; - }; - - // Iterate through all values, and check that both mappings have the same - // users. - for (unsigned I = 0, E = LM.Values.size(); I != E; ++I) { - const Value *L = LM.Values[I]; - const Value *R = RM.Values[I]; - auto LU = L->use_begin(), LE = L->use_end(); - auto RU = R->use_begin(), RE = R->use_end(); - skipUnmappedUsers(LU, LE, LM); - skipUnmappedUsers(RU, RE, RM); - - while (LU != LE) { - if (RU == RE) { - DEBUG(debugUserMismatch(LM, RM, I)); - return false; - } - if (LM.lookup(LU->getUser()) != RM.lookup(RU->getUser())) { - DEBUG(debugUserMismatch(LM, RM, I)); - return false; - } - if (LU->getOperandNo() != RU->getOperandNo()) { - DEBUG(debugUserMismatch(LM, RM, I)); - return false; - } - skipUnmappedUsers(++LU, LE, LM); - skipUnmappedUsers(++RU, RE, RM); - } - if (RU != RE) { - DEBUG(debugUserMismatch(LM, RM, I)); - return false; - } - } - - return true; -} - -static bool verifyBitcodeUseListOrder(const Module &M) { - DEBUG(dbgs() << "*** verify-use-list-order: bitcode ***\n"); - TempFile F; - if (F.init("bc")) - return false; - - if (F.writeBitcode(M)) - return false; - - LLVMContext Context; - std::unique_ptr OtherM = F.readBitcode(Context); - if (!OtherM) - return false; - - return matches(ValueMapping(M), ValueMapping(*OtherM)); -} - -static bool verifyAssemblyUseListOrder(const Module &M) { - DEBUG(dbgs() << "*** verify-use-list-order: assembly ***\n"); - TempFile F; - if (F.init("ll")) - return false; - - if (F.writeAssembly(M)) - return false; - - LLVMContext Context; - std::unique_ptr OtherM = F.readAssembly(Context); - if (!OtherM) - return false; - - return matches(ValueMapping(M), ValueMapping(*OtherM)); -} - -int main(int argc, char **argv) { - sys::PrintStackTraceOnErrorSignal(); - llvm::PrettyStackTraceProgram X(argc, argv); - - // Enable debug stream buffering. - EnableDebugBuffering = true; - - llvm_shutdown_obj Y; // Call llvm_shutdown() on exit. - LLVMContext &Context = getGlobalContext(); - - cl::ParseCommandLineOptions(argc, argv, - "llvm tool to verify use-list order\n"); - - SMDiagnostic Err; - - // Load the input module... - std::unique_ptr M; - M.reset(ParseIRFile(InputFilename, Err, Context)); - - if (!M.get()) { - Err.print(argv[0], errs()); - return 1; - } - - DEBUG(dbgs() << "*** verify-use-list-order ***\n"); - if (!shouldPreserveBitcodeUseListOrder()) { - // Can't verify if order isn't preserved. - DEBUG(dbgs() << "warning: cannot verify bitcode; " - "try -preserve-bc-use-list-order\n"); - return 0; - } - - for (unsigned I = 0, E = NumShuffles; I != E; ++I) { - DEBUG(dbgs() << "*** iteration: " << I << " ***\n"); - - // Shuffle with a different seed each time so that use-lists that aren't - // modified the first time are likely to be modified the next time. - shuffleUseLists(*M, I); - if (!verifyBitcodeUseListOrder(*M)) - report_fatal_error("bitcode use-list order changed"); - - if (shouldPreserveAssemblyUseListOrder()) - if (!verifyAssemblyUseListOrder(*M)) - report_fatal_error("assembly use-list order changed"); - } - - return 0; -} diff --git a/tools/verify-uselistorder/CMakeLists.txt b/tools/verify-uselistorder/CMakeLists.txt new file mode 100644 index 00000000000..260a95adb6a --- /dev/null +++ b/tools/verify-uselistorder/CMakeLists.txt @@ -0,0 +1,12 @@ +set(LLVM_LINK_COMPONENTS + AsmParser + BitReader + BitWriter + Core + IRReader + Support + ) + +add_llvm_tool(verify-uselistorder + verify-uselistorder.cpp + ) diff --git a/tools/verify-uselistorder/LLVMBuild.txt b/tools/verify-uselistorder/LLVMBuild.txt new file mode 100644 index 00000000000..23957c189c8 --- /dev/null +++ b/tools/verify-uselistorder/LLVMBuild.txt @@ -0,0 +1,22 @@ +;===- ./tools/verify-uselistorder/LLVMBuild.txt ----------------*- Conf -*--===; +; +; The LLVM Compiler Infrastructure +; +; This file is distributed under the University of Illinois Open Source +; License. See LICENSE.TXT for details. +; +;===------------------------------------------------------------------------===; +; +; This is an LLVMBuild description file for the components in this subdirectory. +; +; For more information on the LLVMBuild system, please see: +; +; http://llvm.org/docs/LLVMBuild.html +; +;===------------------------------------------------------------------------===; + +[component_0] +type = Tool +name = verify-uselistorder +parent = Tools +required_libraries = IRReader BitWriter Support diff --git a/tools/verify-uselistorder/Makefile b/tools/verify-uselistorder/Makefile new file mode 100644 index 00000000000..90d2aa89128 --- /dev/null +++ b/tools/verify-uselistorder/Makefile @@ -0,0 +1,17 @@ +##===- tools/verify-uselistorder/Makefile ------------------*- Makefile -*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## + +LEVEL := ../.. +TOOLNAME := verify-uselistorder +LINK_COMPONENTS := AsmParser BitReader BitWriter Core IRReader Support + +# This tool has no plugins, optimize startup time. +TOOL_NO_EXPORTS := 1 + +include $(LEVEL)/Makefile.common diff --git a/tools/verify-uselistorder/verify-uselistorder.cpp b/tools/verify-uselistorder/verify-uselistorder.cpp new file mode 100644 index 00000000000..37d7f5f52a5 --- /dev/null +++ b/tools/verify-uselistorder/verify-uselistorder.cpp @@ -0,0 +1,394 @@ +//===- verify-uselistorder.cpp - The LLVM Modular Optimizer ---------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// Verify that use-list order can be serialized correctly. After reading the +// provided IR, this tool shuffles the use-lists and then writes and reads to a +// separate Module whose use-list orders are compared to the original. +// +//===----------------------------------------------------------------------===// + +#include "llvm/ADT/DenseMap.h" +#include "llvm/AsmParser/Parser.h" +#include "llvm/Bitcode/ReaderWriter.h" +#include "llvm/IR/LLVMContext.h" +#include "llvm/IR/Module.h" +#include "llvm/IR/UseListOrder.h" +#include "llvm/IRReader/IRReader.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/FileUtilities.h" +#include "llvm/Support/ManagedStatic.h" +#include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/PrettyStackTrace.h" +#include "llvm/Support/Signals.h" +#include "llvm/Support/SourceMgr.h" +#include "llvm/Support/SystemUtils.h" + +using namespace llvm; + +#define DEBUG_TYPE "use-list-order" + +static cl::opt InputFilename(cl::Positional, + cl::desc(""), + cl::init("-"), + cl::value_desc("filename")); + +static cl::opt SaveTemps("save-temps", cl::desc("Save temp files"), + cl::init(false)); + +static cl::opt + NumShuffles("num-shuffles", + cl::desc("Number of times to shuffle and verify use-lists"), + cl::init(1)); + +namespace { + +struct TempFile { + std::string Filename; + FileRemover Remover; + bool init(const std::string &Ext); + bool writeBitcode(const Module &M) const; + bool writeAssembly(const Module &M) const; + std::unique_ptr readBitcode(LLVMContext &Context) const; + std::unique_ptr readAssembly(LLVMContext &Context) const; +}; + +struct ValueMapping { + DenseMap IDs; + std::vector Values; + + /// \brief Construct a value mapping for module. + /// + /// Creates mapping from every value in \c M to an ID. This mapping includes + /// un-referencable values. + /// + /// Every \a Value that gets serialized in some way should be represented + /// here. The order needs to be deterministic, but it's unnecessary to match + /// the value-ids in the bitcode writer. + /// + /// All constants that are referenced by other values are included in the + /// mapping, but others -- which wouldn't be serialized -- are not. + ValueMapping(const Module &M); + + /// \brief Map a value. + /// + /// Maps a value. If it's a constant, maps all of its operands first. + void map(const Value *V); + unsigned lookup(const Value *V) const { return IDs.lookup(V); } +}; + +} // end namespace + +bool TempFile::init(const std::string &Ext) { + SmallVector Vector; + DEBUG(dbgs() << " - create-temp-file\n"); + if (auto EC = sys::fs::createTemporaryFile("use-list-order", Ext, Vector)) { + (void)EC; + DEBUG(dbgs() << "error: " << EC.message() << "\n"); + return true; + } + assert(!Vector.empty()); + + Filename.assign(Vector.data(), Vector.data() + Vector.size()); + Remover.setFile(Filename, !SaveTemps); + DEBUG(dbgs() << " - filename = " << Filename << "\n"); + return false; +} + +bool TempFile::writeBitcode(const Module &M) const { + DEBUG(dbgs() << " - write bitcode\n"); + std::string ErrorInfo; + raw_fd_ostream OS(Filename.c_str(), ErrorInfo, sys::fs::F_None); + if (!ErrorInfo.empty()) { + DEBUG(dbgs() << "error: " << ErrorInfo << "\n"); + return true; + } + + WriteBitcodeToFile(&M, OS); + return false; +} + +bool TempFile::writeAssembly(const Module &M) const { + DEBUG(dbgs() << " - write assembly\n"); + std::string ErrorInfo; + raw_fd_ostream OS(Filename.c_str(), ErrorInfo, sys::fs::F_Text); + if (!ErrorInfo.empty()) { + DEBUG(dbgs() << "error: " << ErrorInfo << "\n"); + return true; + } + + OS << M; + return false; +} + +std::unique_ptr TempFile::readBitcode(LLVMContext &Context) const { + DEBUG(dbgs() << " - read bitcode\n"); + ErrorOr> BufferOr = + MemoryBuffer::getFile(Filename); + if (!BufferOr) { + DEBUG(dbgs() << "error: " << BufferOr.getError().message() << "\n"); + return nullptr; + } + + std::unique_ptr Buffer = std::move(BufferOr.get()); + ErrorOr ModuleOr = parseBitcodeFile(Buffer.get(), Context); + if (!ModuleOr) { + DEBUG(dbgs() << "error: " << ModuleOr.getError().message() << "\n"); + return nullptr; + } + return std::unique_ptr(ModuleOr.get()); +} + +std::unique_ptr TempFile::readAssembly(LLVMContext &Context) const { + DEBUG(dbgs() << " - read assembly\n"); + SMDiagnostic Err; + std::unique_ptr M(ParseAssemblyFile(Filename, Err, Context)); + if (!M.get()) + DEBUG(dbgs() << "error: "; Err.print("verify-use-list-order", dbgs())); + return M; +} + +ValueMapping::ValueMapping(const Module &M) { + // Every value should be mapped, including things like void instructions and + // basic blocks that are kept out of the ValueEnumerator. + // + // The current mapping order makes it easier to debug the tables. It happens + // to be similar to the ID mapping when writing ValueEnumerator, but they + // aren't (and needn't be) in sync. + + // Globals. + for (const GlobalVariable &G : M.globals()) + map(&G); + for (const GlobalAlias &A : M.aliases()) + map(&A); + for (const Function &F : M) + map(&F); + + // Constants used by globals. + for (const GlobalVariable &G : M.globals()) + if (G.hasInitializer()) + map(G.getInitializer()); + for (const GlobalAlias &A : M.aliases()) + map(A.getAliasee()); + for (const Function &F : M) + if (F.hasPrefixData()) + map(F.getPrefixData()); + + // Function bodies. + for (const Function &F : M) { + for (const Argument &A : F.args()) + map(&A); + for (const BasicBlock &BB : F) + map(&BB); + for (const BasicBlock &BB : F) + for (const Instruction &I : BB) + map(&I); + + // Constants used by instructions. + for (const BasicBlock &BB : F) + for (const Instruction &I : BB) + for (const Value *Op : I.operands()) + if ((isa(Op) && !isa(*Op)) || + isa(Op)) + map(Op); + } +} + +void ValueMapping::map(const Value *V) { + if (IDs.lookup(V)) + return; + + if (auto *C = dyn_cast(V)) + if (!isa(C)) + for (const Value *Op : C->operands()) + map(Op); + + Values.push_back(V); + IDs[V] = Values.size(); +} + +#ifndef NDEBUG +static void dumpMapping(const ValueMapping &VM) { + dbgs() << "value-mapping (size = " << VM.Values.size() << "):\n"; + for (unsigned I = 0, E = VM.Values.size(); I != E; ++I) { + dbgs() << " - id = " << I << ", value = "; + VM.Values[I]->dump(); + } +} + +static void debugValue(const ValueMapping &M, unsigned I, StringRef Desc) { + const Value *V = M.Values[I]; + dbgs() << " - " << Desc << " value = "; + V->dump(); + for (const Use &U : V->uses()) { + dbgs() << " => use: op = " << U.getOperandNo() + << ", user-id = " << M.IDs.lookup(U.getUser()) << ", user = "; + U.getUser()->dump(); + } +} + +static void debugUserMismatch(const ValueMapping &L, const ValueMapping &R, + unsigned I) { + dbgs() << " - fail: user mismatch: ID = " << I << "\n"; + debugValue(L, I, "LHS"); + debugValue(R, I, "RHS"); + + dbgs() << "\nlhs-"; + dumpMapping(L); + dbgs() << "\nrhs-"; + dumpMapping(R); +} + +static void debugSizeMismatch(const ValueMapping &L, const ValueMapping &R) { + dbgs() << " - fail: map size: " << L.Values.size() + << " != " << R.Values.size() << "\n"; + dbgs() << "\nlhs-"; + dumpMapping(L); + dbgs() << "\nrhs-"; + dumpMapping(R); +} +#endif + +static bool matches(const ValueMapping &LM, const ValueMapping &RM) { + DEBUG(dbgs() << "compare value maps\n"); + if (LM.Values.size() != RM.Values.size()) { + DEBUG(debugSizeMismatch(LM, RM)); + return false; + } + + // This mapping doesn't include dangling constant users, since those don't + // get serialized. However, checking if users are constant and calling + // isConstantUsed() on every one is very expensive. Instead, just check if + // the user is mapped. + auto skipUnmappedUsers = + [&](Value::const_use_iterator &U, Value::const_use_iterator E, + const ValueMapping &M) { + while (U != E && !M.lookup(U->getUser())) + ++U; + }; + + // Iterate through all values, and check that both mappings have the same + // users. + for (unsigned I = 0, E = LM.Values.size(); I != E; ++I) { + const Value *L = LM.Values[I]; + const Value *R = RM.Values[I]; + auto LU = L->use_begin(), LE = L->use_end(); + auto RU = R->use_begin(), RE = R->use_end(); + skipUnmappedUsers(LU, LE, LM); + skipUnmappedUsers(RU, RE, RM); + + while (LU != LE) { + if (RU == RE) { + DEBUG(debugUserMismatch(LM, RM, I)); + return false; + } + if (LM.lookup(LU->getUser()) != RM.lookup(RU->getUser())) { + DEBUG(debugUserMismatch(LM, RM, I)); + return false; + } + if (LU->getOperandNo() != RU->getOperandNo()) { + DEBUG(debugUserMismatch(LM, RM, I)); + return false; + } + skipUnmappedUsers(++LU, LE, LM); + skipUnmappedUsers(++RU, RE, RM); + } + if (RU != RE) { + DEBUG(debugUserMismatch(LM, RM, I)); + return false; + } + } + + return true; +} + +static bool verifyBitcodeUseListOrder(const Module &M) { + DEBUG(dbgs() << "*** verify-use-list-order: bitcode ***\n"); + TempFile F; + if (F.init("bc")) + return false; + + if (F.writeBitcode(M)) + return false; + + LLVMContext Context; + std::unique_ptr OtherM = F.readBitcode(Context); + if (!OtherM) + return false; + + return matches(ValueMapping(M), ValueMapping(*OtherM)); +} + +static bool verifyAssemblyUseListOrder(const Module &M) { + DEBUG(dbgs() << "*** verify-use-list-order: assembly ***\n"); + TempFile F; + if (F.init("ll")) + return false; + + if (F.writeAssembly(M)) + return false; + + LLVMContext Context; + std::unique_ptr OtherM = F.readAssembly(Context); + if (!OtherM) + return false; + + return matches(ValueMapping(M), ValueMapping(*OtherM)); +} + +int main(int argc, char **argv) { + sys::PrintStackTraceOnErrorSignal(); + llvm::PrettyStackTraceProgram X(argc, argv); + + // Enable debug stream buffering. + EnableDebugBuffering = true; + + llvm_shutdown_obj Y; // Call llvm_shutdown() on exit. + LLVMContext &Context = getGlobalContext(); + + cl::ParseCommandLineOptions(argc, argv, + "llvm tool to verify use-list order\n"); + + SMDiagnostic Err; + + // Load the input module... + std::unique_ptr M; + M.reset(ParseIRFile(InputFilename, Err, Context)); + + if (!M.get()) { + Err.print(argv[0], errs()); + return 1; + } + + DEBUG(dbgs() << "*** verify-use-list-order ***\n"); + if (!shouldPreserveBitcodeUseListOrder()) { + // Can't verify if order isn't preserved. + DEBUG(dbgs() << "warning: cannot verify bitcode; " + "try -preserve-bc-use-list-order\n"); + return 0; + } + + for (unsigned I = 0, E = NumShuffles; I != E; ++I) { + DEBUG(dbgs() << "*** iteration: " << I << " ***\n"); + + // Shuffle with a different seed each time so that use-lists that aren't + // modified the first time are likely to be modified the next time. + shuffleUseLists(*M, I); + if (!verifyBitcodeUseListOrder(*M)) + report_fatal_error("bitcode use-list order changed"); + + if (shouldPreserveAssemblyUseListOrder()) + if (!verifyAssemblyUseListOrder(*M)) + report_fatal_error("assembly use-list order changed"); + } + + return 0; +}