From: Andrew Lenharth Date: Sun, 23 Oct 2005 03:43:48 +0000 (+0000) Subject: Add several things. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8b7f14e970d87eb52ac34e443bb508a403a2ac0d;p=oota-llvm.git Add several things. loads branches setcc working calls Global address External addresses now I can manage malloc calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23887 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 8942336e9c4..236622ea1f7 100644 --- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -109,11 +109,74 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) { case ISD::CALL: return SelectCALL(Op); case ISD::DYNAMIC_STACKALLOC: - case ISD::ADD_PARTS: - case ISD::SUB_PARTS: - case ISD::SETCC: assert(0 && "You want these too?"); + case ISD::SETCC: { + ISD::CondCode CC = cast(N->getOperand(2))->get(); + assert(MVT::isInteger(N->getOperand(0).getValueType()) && "FP numbers are unnecessary"); + SDOperand Op1 = Select(N->getOperand(0)); + SDOperand Op2 = Select(N->getOperand(1)); + unsigned Opc = Alpha::WTF; + int dir; + switch (CC) { + default: N->dump(); assert(0 && "Unknown integer comparison!"); + case ISD::SETEQ: Opc = Alpha::CMPEQ; dir=1; break; + case ISD::SETLT: Opc = Alpha::CMPLT; dir = 1; break; + case ISD::SETLE: Opc = Alpha::CMPLE; dir = 1; break; + case ISD::SETGT: Opc = Alpha::CMPLT; dir = 0; break; + case ISD::SETGE: Opc = Alpha::CMPLE; dir = 0; break; + case ISD::SETULT: Opc = Alpha::CMPULT; dir = 1; break; + case ISD::SETUGT: Opc = Alpha::CMPULT; dir = 0; break; + case ISD::SETULE: Opc = Alpha::CMPULE; dir = 1; break; + case ISD::SETUGE: Opc = Alpha::CMPULE; dir = 0; break; + case ISD::SETNE: {//Handle this one special + SDOperand Tmp = CurDAG->getTargetNode(Alpha::CMPEQ, MVT::i64, Op1, Op2); + CurDAG->SelectNodeTo(N, Alpha::CMPEQ, MVT::i64, CurDAG->getRegister(Alpha::R31, MVT::i64), Tmp); + return SDOperand(N, 0); + } + } + CurDAG->SelectNodeTo(N, Opc, MVT::i64, dir ? Op1 : Op2, dir ? Op2 : Op1); + return SDOperand(N, 0); + } + + case ISD::BRCOND: { + SDOperand Chain = Select(N->getOperand(0)); + SDOperand CC = Select(N->getOperand(1)); + CurDAG->SelectNodeTo(N, Alpha::BNE, MVT::Other, CC, Chain); + return SDOperand(N, 0); + } + case ISD::LOAD: + case ISD::EXTLOAD: + case ISD::ZEXTLOAD: + case ISD::SEXTLOAD: { + SDOperand Chain = Select(N->getOperand(0)); + SDOperand Address = Select(N->getOperand(1)); + unsigned opcode = N->getOpcode(); + unsigned Opc = Alpha::WTF; + if (opcode == ISD::LOAD) + switch (N->getValueType(0)) { + default: N->dump(); assert(0 && "Bad load!"); + case MVT::i64: Opc = Alpha::LDQ; break; + case MVT::f64: Opc = Alpha::LDT; break; + case MVT::f32: Opc = Alpha::LDS; break; + } + else + switch (cast(N->getOperand(3))->getVT()) { + default: N->dump(); assert(0 && "Bad sign extend!"); + case MVT::i32: Opc = Alpha::LDL; + assert(opcode != ISD::ZEXTLOAD && "Not sext"); break; + case MVT::i16: Opc = Alpha::LDWU; + assert(opcode != ISD::SEXTLOAD && "Not zext"); break; + case MVT::i1: //FIXME: Treat i1 as i8 since there are problems otherwise + case MVT::i8: Opc = Alpha::LDBU; + assert(opcode != ISD::SEXTLOAD && "Not zext"); break; + } + + CurDAG->SelectNodeTo(N, Opc, N->getValueType(0), MVT::Other, + getI64Imm(0), Address, Chain); + return SDOperand(N, Op.ResNo); + } + case ISD::BR: { CurDAG->SelectNodeTo(N, Alpha::BR_DAG, MVT::Other, N->getOperand(1), Select(N->getOperand(0))); @@ -185,6 +248,11 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) { CurDAG->SelectNodeTo(N, Alpha::LDQl, MVT::i64, GA, getGlobalBaseReg()); return SDOperand(N, 0); } + case ISD::ExternalSymbol: + CurDAG->SelectNodeTo(N, Alpha::LDQl, MVT::i64, + CurDAG->getTargetExternalSymbol(cast(N)->getSymbol(), MVT::i64), + CurDAG->getRegister(AlphaLowering.getVRegGP(), MVT::i64)); + return SDOperand(N, 0); case ISD::CALLSEQ_START: case ISD::CALLSEQ_END: { @@ -222,44 +290,37 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) { SDOperand AlphaDAGToDAGISel::SelectCALL(SDOperand Op) { SDNode *N = Op.Val; SDOperand Chain = Select(N->getOperand(0)); - SDOperand InFlag; // Null incoming flag value. SDOperand Addr = Select(N->getOperand(1)); // unsigned CallOpcode; std::vector CallOperands; std::vector TypeOperands; - CallOperands.push_back(CurDAG->getCopyToReg(Chain, Alpha::R27, Addr)); - CallOperands.push_back(getI64Imm(0)); - //grab the arguments for(int i = 2, e = N->getNumOperands(); i < e; ++i) { - CallOperands.push_back(Select(N->getOperand(i))); TypeOperands.push_back(N->getOperand(i).getValueType()); + CallOperands.push_back(Select(N->getOperand(i))); } + int count = N->getNumOperands() - 2; + static const unsigned args_int[] = {Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21}; static const unsigned args_float[] = {Alpha::F16, Alpha::F17, Alpha::F18, Alpha::F19, Alpha::F20, Alpha::F21}; - for (unsigned i = 0; i < std::min((size_t)6, CallOperands.size()); ++i) { + for (int i = 0; i < std::min(6, count); ++i) { if (MVT::isInteger(TypeOperands[i])) { - Chain = CurDAG->getCopyToReg(Chain, args_int[i], CallOperands[i], InFlag); - InFlag = Chain.getValue(1); - CallOperands.push_back(CurDAG->getRegister(args_int[i], TypeOperands[i])); + Chain = CurDAG->getCopyToReg(Chain, args_int[i], CallOperands[i]); } else { - assert(0 && "No FP support yet"); + assert(0 && "No FP support yet"); } } assert(CallOperands.size() <= 6 && "Too big a call"); + Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Addr); // Finally, once everything is in registers to pass to the call, emit the // call itself. - if (InFlag.Val) - CallOperands.push_back(InFlag); // Strong dep on register copies. - else - CallOperands.push_back(Chain); // Weak dep on whatever occurs before - Chain = CurDAG->getTargetNode(Alpha::JSR, MVT::Other, MVT::Flag, CallOperands); + Chain = CurDAG->getTargetNode(Alpha::JSRDAG, MVT::Other, Chain ); std::vector CallResults; @@ -267,8 +328,7 @@ SDOperand AlphaDAGToDAGISel::SelectCALL(SDOperand Op) { default: assert(0 && "Unexpected ret value!"); case MVT::Other: break; case MVT::i64: - Chain = CurDAG->getCopyFromReg(Chain, Alpha::R0, MVT::i64, - Chain.getValue(1)).getValue(1); + Chain = CurDAG->getCopyFromReg(Chain, Alpha::R0, MVT::i64).getValue(1); CallResults.push_back(Chain.getValue(0)); break; } diff --git a/lib/Target/Alpha/AlphaInstrInfo.td b/lib/Target/Alpha/AlphaInstrInfo.td index 4ffbe3a9a54..95b7ec2d42b 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.td +++ b/lib/Target/Alpha/AlphaInstrInfo.td @@ -55,7 +55,7 @@ def immZAP : PatLeaf<(imm), [{ UImm >>= 8; } return build != 0; -}]>; +}], iZAPX>; def intop : PatFrag<(ops node:$op), (sext_inreg node:$op, i32)>; @@ -311,8 +311,8 @@ def ZAP : OForm< 0x12, 0x30, "zap $RA,$RB,$RC", []>; //Zero bytes def ZAPi : OFormL<0x12, 0x30, "zap $RA,$L,$RC", []>; //Zero bytes //FIXME: what to do about zapnot? see ZAP :) def ZAPNOT : OForm< 0x12, 0x31, "zapnot $RA,$RB,$RC", []>; //Zero bytes not -def ZAPNOTi : OFormL<0x12, 0x31, "zapnot $RA,$L,$RC", []>; -def : Pat<(and GPRC:$OP1, immZAP:$OP2), (ZAPNOTi GPRC:$OP1, (iZAPX immZAP:$OP2))>; +def ZAPNOTi : OFormL<0x12, 0x31, "zapnot $RA,$L,$RC", + [(set GPRC:$RC, (and GPRC:$RA, immZAP:$L))]>; //Comparison, int def CMPBGE : OForm< 0x10, 0x0F, "cmpbge $RA,$RB,$RC", []>; //Compare byte @@ -367,6 +367,14 @@ let isCall = 1, def JSR : MbrForm< 0x1A, 0x01, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr $RD,($RS),$DISP">; //Jump to subroutine def BSR : BForm<0x34, "bsr $RA,$DISP">; //Branch to subroutine } +let isCall = 1, + Defs = [R0, R1, R2, R3, R4, R5, R6, R7, R8, R16, R17, R18, R19, + R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, + F0, F1, + F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, + F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30], Uses = [R27, R29] in { + def JSRDAG : MbrForm< 0x1A, 0x01, (ops ), "jsr $$26,($$27),0">; //Jump to subroutine +} let isCall = 1, Defs = [R24, R25, R27, R28], Uses = [R24, R25] in def JSRs : MbrForm< 0x1A, 0x01, (ops GPRC:$RD, GPRC:$RS, s14imm:$DISP), "jsr $RD,($RS),$DISP">; //Jump to div or rem