From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 21 Mar 2009 13:06:14 +0000 (+0900)
Subject: MIPS: EMMA2RH: Use handle_edge_irq() handler for GPIO interrupts
X-Git-Tag: firefly_0821_release~15193^2~12
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8da55bb2586a0867b9cf14f107225f382a47b28f;p=firefly-linux-kernel-4.4.55.git
MIPS: EMMA2RH: Use handle_edge_irq() handler for GPIO interrupts
EMMA's GPIO interrupts are latched by GPIO interrupt status register.
In this case, we're encouraged to use handle_edge_irq() handler.
The following changes are made along with replacing set_irq_chip() with
set_irq_chip_and_handler_name(,,handle_edge_irq,"edge"):
* Fix emma2rh_gpio_irq_ack not to disable interrupts
With handle_edge_irq(), we're not expected to disable interrupts
when chip->ack is served, so fix it accordingly. We also add a new
emma2rh_gpio_irq_mask_ack() for chip->mask_ack operation, instead.
* Remove emma2rh_gpio_irq_end(), as chip->end is no longer served.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 263132d7b3a3..1e6457ca4f44 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -149,37 +149,28 @@ static void emma2rh_gpio_irq_disable(unsigned int irq)
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
- u32 reg;
-
irq -= EMMA2RH_GPIO_IRQ_BASE;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
-static void emma2rh_gpio_irq_end(unsigned int irq)
+static void emma2rh_gpio_irq_mask_ack(unsigned int irq)
{
u32 reg;
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-
- irq -= EMMA2RH_GPIO_IRQ_BASE;
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
- }
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
struct irq_chip emma2rh_gpio_irq_controller = {
.name = "emma2rh_gpio_irq",
.ack = emma2rh_gpio_irq_ack,
.mask = emma2rh_gpio_irq_disable,
- .mask_ack = emma2rh_gpio_irq_ack,
+ .mask_ack = emma2rh_gpio_irq_mask_ack,
.unmask = emma2rh_gpio_irq_enable,
- .end = emma2rh_gpio_irq_end,
};
void emma2rh_gpio_irq_init(void)
@@ -187,8 +178,9 @@ void emma2rh_gpio_irq_init(void)
u32 i;
for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
- set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
- &emma2rh_gpio_irq_controller);
+ set_irq_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i,
+ &emma2rh_gpio_irq_controller,
+ handle_edge_irq, "edge");
}
static struct irqaction irq_cascade = {