From: Ulrich Weigand Date: Fri, 3 May 2013 19:51:09 +0000 (+0000) Subject: [PowerPC] Add some Book II instructions to AsmParser X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8e4ba8f7b19615907e5874b3aa661d52c21fff74;p=oota-llvm.git [PowerPC] Add some Book II instructions to AsmParser This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 41b4e017e65..b6f4e852154 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -365,6 +365,12 @@ class XForm_1 opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> : XForm_base_r3xo; +class XForm_1a opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list pattern> + : XForm_base_r3xo { + let RST = 0; +} + class XForm_6 opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list pattern> : XForm_base_r3xo_swapped { diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 74b7aacf569..4763069f25a 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -2112,6 +2112,17 @@ def : Pat<(fma f32:$A, (fneg f32:$C), f32:$B), include "PPCInstrAltivec.td" include "PPCInstr64Bit.td" + +//===----------------------------------------------------------------------===// +// PowerPC Instructions used for assembler/disassembler only +// + +def ISYNC : XLForm_2_ext<19, 150, 0, 0, 0, (outs), (ins), + "isync", SprISYNC, []>; + +def ICBI : XForm_1a<31, 982, (outs), (ins memrr:$src), + "icbi $src", LdStICBI, []>; + //===----------------------------------------------------------------------===// // PowerPC Assembler Instruction Aliases // diff --git a/test/MC/PowerPC/ppc64-encoding-bookII.s b/test/MC/PowerPC/ppc64-encoding-bookII.s new file mode 100644 index 00000000000..e74c971323f --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-bookII.s @@ -0,0 +1,58 @@ + +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s + +# Cache management instruction + +# FIXME: icbi 2, 3 +# FIXME: icbt 1, 2, 3 + +# FIXME: dcbt 2, 3, 10 +# FIXME: dcbtst 2, 3, 10 +# CHECK: dcbz 2, 3 # encoding: [0x7c,0x02,0x1f,0xec] + dcbz 2, 3 +# CHECK: dcbst 2, 3 # encoding: [0x7c,0x02,0x18,0x6c] + dcbst 2, 3 +# FIXME: dcbf 2, 3, 1 + +# Synchronization instructions + +# FIXME: isync + +# FIXME: lbarx 2, 3, 4, 1 +# FIXME: lharx 2, 3, 4, 1 +# FIXME: lwarx 2, 3, 4, 1 +# FIXME: ldarx 2, 3, 4, 1 + +# FIXME: stbcx. 2, 3, 4 +# FIXME: sthcx. 2, 3, 4 +# CHECK: stwcx. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2d] + stwcx. 2, 3, 4 +# CHECK: stdcx. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xad] + stdcx. 2, 3, 4 + +# FIXME: sync 2 +# FIXME: eieio +# FIXME: wait 2 + +# Extended mnemonics + +# CHECK: dcbf 2, 3 # encoding: [0x7c,0x02,0x18,0xac] + dcbf 2, 3 +# FIXME: dcbfl 2, 3 + +# FIXME: lbarx 2, 3, 4 +# FIXME: lharx 2, 3, 4 +# CHECK: lwarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x28] + lwarx 2, 3, 4 +# CHECK: ldarx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xa8] + ldarx 2, 3, 4 + +# CHECK: sync # encoding: [0x7c,0x00,0x04,0xac] + sync +# FIXME: lwsync +# FIXME: ptesync + +# FIXME: wait +# FIXME: waitrsv +# FIXME: waitimpl +