From: Owen Anderson Date: Thu, 11 Nov 2010 23:12:55 +0000 (+0000) Subject: Fill out support for Thumb2 encodings of NEON instructions. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8f143913141991baaa535ca0da7c8a81606d6392;p=oota-llvm.git Fill out support for Thumb2 encodings of NEON instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118854 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index cd4ac6a6c19..b068c64f63e 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -165,6 +165,8 @@ namespace { const { return 0; } unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val) const { return 0; } + unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val) + const { return 0; } unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } unsigned getCCOutOpValue(const MachineInstr &MI, unsigned Op) diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 56aa4b0e0d8..251e5c27a0b 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -2046,6 +2046,8 @@ class NVLaneOp opcod1, bits<4> opcod2, bits<2> opcod3, let Pattern = pattern; list Predicates = [HasNEON]; + string PostEncoderMethod = "NEONThumb2DupPostEncoder"; + bits<5> V; bits<4> R; bits<4> p; diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index a407acad4d4..ebd0d9b5599 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -176,6 +176,8 @@ public: unsigned EncodedValue) const; unsigned NEONThumb2LoadStorePostEncoder(const MCInst &MI, unsigned EncodedValue) const; + unsigned NEONThumb2DupPostEncoder(const MCInst &MI, + unsigned EncodedValue) const; void EmitByte(unsigned char C, raw_ostream &OS) const { OS << (char)C; @@ -234,6 +236,21 @@ unsigned ARMMCCodeEmitter::NEONThumb2LoadStorePostEncoder(const MCInst &MI, return EncodedValue; } +/// NEONThumb2DupPostEncoder - Post-process encoded NEON vdup +/// instructions, and rewrite them to their Thumb2 form if we are currently in +/// Thumb2 mode. +unsigned ARMMCCodeEmitter::NEONThumb2DupPostEncoder(const MCInst &MI, + unsigned EncodedValue) const { + const ARMSubtarget &Subtarget = TM.getSubtarget(); + if (Subtarget.isThumb2()) { + EncodedValue &= 0x00FFFFFF; + EncodedValue |= 0xEE000000; + } + + return EncodedValue; +} + + /// getMachineOpValue - Return binary encoding of operand. If the machine /// operand requires relocation, record the relocation and return zero. diff --git a/test/MC/ARM/neont2-absdiff-encoding.s b/test/MC/ARM/neont2-absdiff-encoding.s new file mode 100644 index 00000000000..be8e7988725 --- /dev/null +++ b/test/MC/ARM/neont2-absdiff-encoding.s @@ -0,0 +1,86 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * +@ NOTE: This currently fails because the ASM parser doesn't parse vabal. + +.code 16 + +@ CHECK: vabd.s8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xef] + vabd.s8 d16, d16, d17 +@ CHECK: vabd.s16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xef] + vabd.s16 d16, d16, d17 +@ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xef] + vabd.s32 d16, d16, d17 +@ CHECK: vabd.u8 d16, d16, d17 @ encoding: [0xa1,0x07,0x40,0xff] + vabd.u8 d16, d16, d17 +@ CHECK: vabd.u16 d16, d16, d17 @ encoding: [0xa1,0x07,0x50,0xff] + vabd.u16 d16, d16, d17 + @ CHECK: vabd.u32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xff] + vabd.u32 d16, d16, d17 +@ CHECK: vabd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xff] + vabd.f32 d16, d16, d17 +@ CHECK: vabd.s8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xef] + vabd.s8 q8, q8, q9 +@ CHECK: vabd.s16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xef] + vabd.s16 q8, q8, q9 +@ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xef] + vabd.s32 q8, q8, q9 +@ CHECK: vabd.u8 q8, q8, q9 @ encoding: [0xe2,0x07,0x40,0xff] + vabd.u8 q8, q8, q9 +@ CHECK: vabd.u16 q8, q8, q9 @ encoding: [0xe2,0x07,0x50,0xff] + vabd.u16 q8, q8, q9 +@ CHECK: vabd.u32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xff] + vabd.u32 q8, q8, q9 +@ CHECK: vabd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x60,0xff] + vabd.f32 q8, q8, q9 + +@ CHECK: vabdl.s8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xef] + vabdl.s8 q8, d16, d17 +@ CHECK: vabdl.s16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xef] + vabdl.s16 q8, d16, d17 +@ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xef] + vabdl.s32 q8, d16, d17 +@ CHECK: vabdl.u8 q8, d16, d17 @ encoding: [0xa1,0x07,0xc0,0xff] + vabdl.u8 q8, d16, d17 +@ CHECK: vabdl.u16 q8, d16, d17 @ encoding: [0xa1,0x07,0xd0,0xff] + vabdl.u16 q8, d16, d17 +@ CHECK: vabdl.u32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xff] + vabdl.u32 q8, d16, d17 + +@ CHECK: vaba.s8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xef] + vaba.s8 d16, d18, d17 +@ CHECK: vaba.s16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xef] + vaba.s16 d16, d18, d17 +@ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xef] + vaba.s32 d16, d18, d17 +@ CHECK: vaba.u8 d16, d18, d17 @ encoding: [0xb1,0x07,0x42,0xff] + vaba.u8 d16, d18, d17 +@ CHECK: vaba.u16 d16, d18, d17 @ encoding: [0xb1,0x07,0x52,0xff] + vaba.u16 d16, d18, d17 +@ CHECK: vaba.u32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xff] + vaba.u32 d16, d18, d17 +@ CHECK: vaba.s8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xef] + vaba.s8 q9, q8, q10 +@ CHECK: vaba.s16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xef] + vaba.s16 q9, q8, q10 +@ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xef] + vaba.s32 q9, q8, q10 +@ CHECK: vaba.u8 q9, q8, q10 @ encoding: [0xf4,0x27,0x40,0xff] + vaba.u8 q9, q8, q10 +@ CHECK: vaba.u16 q9, q8, q10 @ encoding: [0xf4,0x27,0x50,0xff] + vaba.u16 q9, q8, q10 +@ CHECK: vaba.u32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xff] + vaba.u32 q9, q8, q10 + +@ CHECK: vabal.s8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xef] + vabal.s8 q8, d19, d18 +@ CHECK: vabal.s16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xef] + vabal.s16 q8, d19, d18 +@ CHECK: vabal.s32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xef] + vabal.s32 q8, d19, d18 +@ CHECK: vabal.u8 q8, d19, d18 @ encoding: [0xa2,0x05,0xc3,0xff] + vabal.u8 q8, d19, d18 +@ CHECK: vabal.u16 q8, d19, d18 @ encoding: [0xa2,0x05,0xd3,0xff] + vabal.u16 q8, d19, d18 +@ CHECK: vabal.u32 q8, d19, d18 @ encoding: [0xa2,0x05,0xe3,0xff] + vabal.u32 q8, d19, d18 + diff --git a/test/MC/ARM/neont2-bitcount-encoding.s b/test/MC/ARM/neont2-bitcount-encoding.s new file mode 100644 index 00000000000..cebd972f98a --- /dev/null +++ b/test/MC/ARM/neont2-bitcount-encoding.s @@ -0,0 +1,34 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vcnt.8 d16, d16 @ encoding: [0x20,0x05,0xf0,0xff] + vcnt.8 d16, d16 +@ CHECK: vcnt.8 q8, q8 @ encoding: [0x60,0x05,0xf0,0xff] + vcnt.8 q8, q8 +@ CHECK: vclz.i8 d16, d16 @ encoding: [0xa0,0x04,0xf0,0xff] + vclz.i8 d16, d16 +@ CHECK: vclz.i16 d16, d16 @ encoding: [0xa0,0x04,0xf4,0xff] + vclz.i16 d16, d16 +@ CHECK: vclz.i32 d16, d16 @ encoding: [0xa0,0x04,0xf8,0xff] + vclz.i32 d16, d16 +@ CHECK: vclz.i8 q8, q8 @ encoding: [0xe0,0x04,0xf0,0xff] + vclz.i8 q8, q8 +@ CHECK: vclz.i16 q8, q8 @ encoding: [0xe0,0x04,0xf4,0xff] + vclz.i16 q8, q8 +@ CHECK: vclz.i32 q8, q8 @ encoding: [0xe0,0x04,0xf8,0xff] + vclz.i32 q8, q8 +@ CHECK: vcls.s8 d16, d16 @ encoding: [0x20,0x04,0xf0,0xff] + vcls.s8 d16, d16 +@ CHECK: vcls.s16 d16, d16 @ encoding: [0x20,0x04,0xf4,0xff] + vcls.s16 d16, d16 +@ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xff] + vcls.s32 d16, d16 +@ CHECK: vcls.s8 q8, q8 @ encoding: [0x60,0x04,0xf0,0xff] + vcls.s8 q8, q8 +@ CHECK: vcls.s16 q8, q8 @ encoding: [0x60,0x04,0xf4,0xff] + vcls.s16 q8, q8 +@ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xff] + vcls.s32 q8, q8 + diff --git a/test/MC/ARM/neont2-bitwise-encoding.s b/test/MC/ARM/neont2-bitwise-encoding.s new file mode 100644 index 00000000000..f5062f8e543 --- /dev/null +++ b/test/MC/ARM/neont2-bitwise-encoding.s @@ -0,0 +1,49 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vand d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xef] + vand d16, d17, d16 +@ CHECK: vand q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xef] + vand q8, q8, q9 + +@ CHECK: veor d16, d17, d16 @ encoding: [0xb0,0x01,0x41,0xff] + veor d16, d17, d16 +@ CHECK: veor q8, q8, q9 @ encoding: [0xf2,0x01,0x40,0xff] + veor q8, q8, q9 + +@ CHECK: vorr d16, d17, d16 @ encoding: [0xb0,0x01,0x61,0xef] + vorr d16, d17, d16 +@ CHECK: vorr q8, q8, q9 @ encoding: [0xf2,0x01,0x60,0xef] + vorr q8, q8, q9 +@ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xef] + vorr.i32 d16, #0x1000000 +@ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xef] + vorr.i32 q8, #0x1000000 +@ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xef] + vorr.i32 q8, #0x0 + +@ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xef] + vbic d16, d17, d16 +@ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xef] + vbic q8, q8, q9 +@ CHECK: vbic.i32 d16, #0xFF000000 @ encoding: [0x3f,0x07,0xc7,0xff] + vbic.i32 d16, #0xFF000000 +@ CHECK: vbic.i32 q8, #0xFF000000 @ encoding: [0x7f,0x07,0xc7,0xff] + vbic.i32 q8, #0xFF000000 + +@ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xef] + vorn d16, d17, d16 +@ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xef] + vorn q8, q8, q9 + +@ CHECK: vmvn d16, d16 @ encoding: [0xa0,0x05,0xf0,0xff] + vmvn d16, d16 +@ CHECK: vmvn q8, q8 @ encoding: [0xe0,0x05,0xf0,0xff] + vmvn q8, q8 + +@ CHECK: vbsl d18, d17, d16 @ encoding: [0xb0,0x21,0x51,0xff] + vbsl d18, d17, d16 +@ CHECK: vbsl q8, q10, q9 @ encoding: [0xf2,0x01,0x54,0xff] + vbsl q8, q10, q9 diff --git a/test/MC/ARM/neont2-convert-encoding.s b/test/MC/ARM/neont2-convert-encoding.s new file mode 100644 index 00000000000..9b0096048e0 --- /dev/null +++ b/test/MC/ARM/neont2-convert-encoding.s @@ -0,0 +1,36 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s + +.code 16 + +@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xff] + vcvt.s32.f32 d16, d16 +@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xff] + vcvt.u32.f32 d16, d16 +@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xff] + vcvt.f32.s32 d16, d16 +@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xff] + vcvt.f32.u32 d16, d16 +@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xff] + vcvt.s32.f32 q8, q8 +@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xe0,0x07,0xfb,0xff] + vcvt.u32.f32 q8, q8 +@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xff] + vcvt.f32.s32 q8, q8 +@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xe0,0x06,0xfb,0xff] + vcvt.f32.u32 q8, q8 +@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xef] + vcvt.s32.f32 d16, d16, #1 +@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xff] + vcvt.u32.f32 d16, d16, #1 +@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xef] + vcvt.f32.s32 d16, d16, #1 +@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0x30,0x0e,0xff,0xff] + vcvt.f32.u32 d16, d16, #1 +@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xef] + vcvt.s32.f32 q8, q8, #1 +@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0x70,0x0f,0xff,0xff] + vcvt.u32.f32 q8, q8, #1 +@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xef] + vcvt.f32.s32 q8, q8, #1 +@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xff] + vcvt.f32.u32 q8, q8, #1 diff --git a/test/MC/ARM/neont2-dup-encoding.s b/test/MC/ARM/neont2-dup-encoding.s new file mode 100644 index 00000000000..53308331ef3 --- /dev/null +++ b/test/MC/ARM/neont2-dup-encoding.s @@ -0,0 +1,29 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vdup.8 d16, r0 @ encoding: [0x90,0x0b,0xc0,0xee] + vdup.8 d16, r0 +@ CHECK: vdup.16 d16, r0 @ encoding: [0xb0,0x0b,0x80,0xee] + vdup.16 d16, r0 +@ CHECK: vdup.32 d16, r0 @ encoding: [0x90,0x0b,0x80,0xee] + vdup.32 d16, r0 +@ CHECK: vdup.8 q8, r0 @ encoding: [0x90,0x0b,0xe0,0xee] + vdup.8 q8, r0 +@ CHECK: vdup.16 q8, r0 @ encoding: [0xb0,0x0b,0xa0,0xee] + vdup.16 q8, r0 +@ CHECK: vdup.32 q8, r0 @ encoding: [0x90,0x0b,0xa0,0xee] + vdup.32 q8, r0 +@ CHECK: vdup.8 d16, d16[1] @ encoding: [0x20,0x0c,0xf3,0xff] + vdup.8 d16, d16[1] +@ CHECK: vdup.16 d16, d16[1] @ encoding: [0x20,0x0c,0xf6,0xff] + vdup.16 d16, d16[1] +@ CHECK: vdup.32 d16, d16[1] @ encoding: [0x20,0x0c,0xfc,0xff] + vdup.32 d16, d16[1] +@ CHECK: vdup.8 q8, d16[1] @ encoding: [0x60,0x0c,0xf3,0xff] + vdup.8 q8, d16[1] +@ CHECK: vdup.16 q8, d16[1] @ encoding: [0x60,0x0c,0xf6,0xff] + vdup.16 q8, d16[1] +@ CHECK: vdup.32 q8, d16[1] @ encoding: [0x60,0x0c,0xfc,0xff] + vdup.32 q8, d16[1] diff --git a/test/MC/ARM/neont2-mov-encoding.s b/test/MC/ARM/neont2-mov-encoding.s new file mode 100644 index 00000000000..4f6b687210e --- /dev/null +++ b/test/MC/ARM/neont2-mov-encoding.s @@ -0,0 +1,119 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmov.i8 d16, #0x8 @ encoding: [0x18,0x0e,0xc0,0xef] + vmov.i8 d16, #0x8 +@ CHECK: vmov.i16 d16, #0x10 @ encoding: [0x10,0x08,0xc1,0xef] + vmov.i16 d16, #0x10 +@ CHECK: vmov.i16 d16, #0x1000 @ encoding: [0x10,0x0a,0xc1,0xef] + vmov.i16 d16, #0x1000 +@ CHECK: vmov.i32 d16, #0x20 @ encoding: [0x10,0x00,0xc2,0xef] + vmov.i32 d16, #0x20 +@ CHECK: vmov.i32 d16, #0x2000 @ encoding: [0x10,0x02,0xc2,0xef] + vmov.i32 d16, #0x2000 +@ CHECK: vmov.i32 d16, #0x200000 @ encoding: [0x10,0x04,0xc2,0xef] + vmov.i32 d16, #0x200000 +@ CHECK: vmov.i32 d16, #0x20000000 @ encoding: [0x10,0x06,0xc2,0xef] + vmov.i32 d16, #0x20000000 +@ CHECK: vmov.i32 d16, #0x20FF @ encoding: [0x10,0x0c,0xc2,0xef] + vmov.i32 d16, #0x20FF +@ CHECK: vmov.i32 d16, #0x20FFFF @ encoding: [0x10,0x0d,0xc2,0xef] + vmov.i32 d16, #0x20FFFF +@ CHECK: vmov.i64 d16, #0xFF0000FF0000FFFF @ encoding: [0x33,0x0e,0xc1,0xff] + vmov.i64 d16, #0xFF0000FF0000FFFF +@ CHECK: vmov.i8 q8, #0x8 @ encoding: [0x58,0x0e,0xc0,0xef] + vmov.i8 q8, #0x8 +@ CHECK: vmov.i16 q8, #0x10 @ encoding: [0x50,0x08,0xc1,0xef] + vmov.i16 q8, #0x10 +@ CHECK: vmov.i16 q8, #0x1000 @ encoding: [0x50,0x0a,0xc1,0xef] + vmov.i16 q8, #0x1000 +@ CHECK: vmov.i32 q8, #0x20 @ encoding: [0x50,0x00,0xc2,0xef] + vmov.i32 q8, #0x20 +@ CHECK: vmov.i32 q8, #0x2000 @ encoding: [0x50,0x02,0xc2,0xef] + vmov.i32 q8, #0x2000 +@ CHECK: vmov.i32 q8, #0x200000 @ encoding: [0x50,0x04,0xc2,0xef] + vmov.i32 q8, #0x200000 +@ CHECK: vmov.i32 q8, #0x20000000 @ encoding: [0x50,0x06,0xc2,0xef] + vmov.i32 q8, #0x20000000 +@ CHECK: vmov.i32 q8, #0x20FF @ encoding: [0x50,0x0c,0xc2,0xef] + vmov.i32 q8, #0x20FF +@ CHECK: vmov.i32 q8, #0x20FFFF @ encoding: [0x50,0x0d,0xc2,0xef] + vmov.i32 q8, #0x20FFFF +@ CHECK: vmov.i64 q8, #0xFF0000FF0000FFFF @ encoding: [0x73,0x0e,0xc1,0xff] + vmov.i64 q8, #0xFF0000FF0000FFFF +@ CHECK: vmvn.i16 d16, #0x10 @ encoding: [0x30,0x08,0xc1,0xef] + vmvn.i16 d16, #0x10 +@ CHECK: vmvn.i16 d16, #0x1000 @ encoding: [0x30,0x0a,0xc1,0xef] + vmvn.i16 d16, #0x1000 +@ CHECK: vmvn.i32 d16, #0x20 @ encoding: [0x30,0x00,0xc2,0xef] + vmvn.i32 d16, #0x20 +@ CHECK: vmvn.i32 d16, #0x2000 @ encoding: [0x30,0x02,0xc2,0xef] + vmvn.i32 d16, #0x2000 +@ CHECK: vmvn.i32 d16, #0x200000 @ encoding: [0x30,0x04,0xc2,0xef] + vmvn.i32 d16, #0x200000 +@ CHECK: vmvn.i32 d16, #0x20000000 @ encoding: [0x30,0x06,0xc2,0xef] + vmvn.i32 d16, #0x20000000 +@ CHECK: vmvn.i32 d16, #0x20FF @ encoding: [0x30,0x0c,0xc2,0xef] + vmvn.i32 d16, #0x20FF +@ CHECK: vmvn.i32 d16, #0x20FFFF @ encoding: [0x30,0x0d,0xc2,0xef] + vmvn.i32 d16, #0x20FFFF +@ CHECK: vmovl.s8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xef] + vmovl.s8 q8, d16 +@ CHECK: vmovl.s16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xef] + vmovl.s16 q8, d16 +@ CHECK: vmovl.s32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xef] + vmovl.s32 q8, d16 +@ CHECK: vmovl.u8 q8, d16 @ encoding: [0x30,0x0a,0xc8,0xff] + vmovl.u8 q8, d16 +@ CHECK: vmovl.u16 q8, d16 @ encoding: [0x30,0x0a,0xd0,0xff] + vmovl.u16 q8, d16 +@ CHECK: vmovl.u32 q8, d16 @ encoding: [0x30,0x0a,0xe0,0xff] + vmovl.u32 q8, d16 +@ CHECK: vmovn.i16 d16, q8 @ encoding: [0x20,0x02,0xf2,0xff] + vmovn.i16 d16, q8 +@ CHECK: vmovn.i32 d16, q8 @ encoding: [0x20,0x02,0xf6,0xff] + vmovn.i32 d16, q8 +@ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xff] + vmovn.i64 d16, q8 +@ CHECK: vqmovn.s16 d16, q8 @ encoding: [0xa0,0x02,0xf2,0xff] + vqmovn.s16 d16, q8 +@ CHECK: vqmovn.s32 d16, q8 @ encoding: [0xa0,0x02,0xf6,0xff] + vqmovn.s32 d16, q8 +@ CHECK: vqmovn.s64 d16, q8 @ encoding: [0xa0,0x02,0xfa,0xff] + vqmovn.s64 d16, q8 +@ CHECK: vqmovn.u16 d16, q8 @ encoding: [0xe0,0x02,0xf2,0xff] + vqmovn.u16 d16, q8 +@ CHECK: vqmovn.u32 d16, q8 @ encoding: [0xe0,0x02,0xf6,0xff] + vqmovn.u32 d16, q8 +@ CHECK: vqmovn.u64 d16, q8 @ encoding: [0xe0,0x02,0xfa,0xff] + vqmovn.u64 d16, q8 +@ CHECK: vqmovun.s16 d16, q8 @ encoding: [0x60,0x02,0xf2,0xff] + vqmovun.s16 d16, q8 +@ CHECK: vqmovun.s32 d16, q8 @ encoding: [0x60,0x02,0xf6,0xff] + vqmovun.s32 d16, q8 +@ CHECK: vqmovun.s64 d16, q8 @ encoding: [0x60,0x02,0xfa,0xff] + vqmovun.s64 d16, q8 +@ CHECK: vmov.s8 r0, d16[1] @ encoding: [0xb0,0x0b,0x50,0xee] + vmov.s8 r0, d16[1] +@ CHECK: vmov.s16 r0, d16[1] @ encoding: [0xf0,0x0b,0x10,0xee] + vmov.s16 r0, d16[1] +@ CHECK: vmov.u8 r0, d16[1] @ encoding: [0xb0,0x0b,0xd0,0xee] + vmov.u8 r0, d16[1] +@ CHECK: vmov.u16 r0, d16[1] @ encoding: [0xf0,0x0b,0x90,0xee] + vmov.u16 r0, d16[1] +@ CHECK: vmov.32 r0, d16[1] @ encoding: [0x90,0x0b,0x30,0xee] + vmov.32 r0, d16[1] +@ CHECK: vmov.8 d16[1], r1 @ encoding: [0xb0,0x1b,0x40,0xee] + vmov.8 d16[1], r1 +@ CHECK: vmov.16 d16[1], r1 @ encoding: [0xf0,0x1b,0x00,0xee] + vmov.16 d16[1], r1 +@ CHECK: vmov.32 d16[1], r1 @ encoding: [0x90,0x1b,0x20,0xee] + vmov.32 d16[1], r1 +@ CHECK: vmov.8 d18[1], r1 @ encoding: [0xb0,0x1b,0x42,0xee] + vmov.8 d18[1], r1 +@ CHECK: vmov.16 d18[1], r1 @ encoding: [0xf0,0x1b,0x02,0xee] + vmov.16 d18[1], r1 +@ CHECK: vmov.32 d18[1], r1 @ encoding: [0x90,0x1b,0x22,0xee] + vmov.32 d18[1], r1 diff --git a/test/MC/ARM/neont2-mul-accum-encoding.s b/test/MC/ARM/neont2-mul-accum-encoding.s new file mode 100644 index 00000000000..66d4e10152c --- /dev/null +++ b/test/MC/ARM/neont2-mul-accum-encoding.s @@ -0,0 +1,69 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vmla.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xef] + vmla.i8 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i16 d16, d18, d17 +@ CHECK: vmla.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xef] + vmla.i32 d16, d18, d17 +@ CHECK: vmla.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x42,0xef] + vmla.f32 d16, d18, d17 +@ CHECK: vmla.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xef] + vmla.i8 q9, q8, q10 +@ CHECK: vmla.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xef] + vmla.i16 q9, q8, q10 +@ CHECK: vmla.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xef] + vmla.i32 q9, q8, q10 +@ CHECK: vmla.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x40,0xef] + vmla.f32 q9, q8, q10 +@ CHECK: vmlal.s8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xef] + vmlal.s8 q8, d19, d18 +@ CHECK: vmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xef] + vmlal.s16 q8, d19, d18 +@ CHECK: vmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xef] + vmlal.s32 q8, d19, d18 +@ CHECK: vmlal.u8 q8, d19, d18 @ encoding: [0xa2,0x08,0xc3,0xff] + vmlal.u8 q8, d19, d18 +@ CHECK: vmlal.u16 q8, d19, d18 @ encoding: [0xa2,0x08,0xd3,0xff] + vmlal.u16 q8, d19, d18 +@ CHECK: vmlal.u32 q8, d19, d18 @ encoding: [0xa2,0x08,0xe3,0xff] + vmlal.u32 q8, d19, d18 +@ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xef] + vqdmlal.s16 q8, d19, d18 +@ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xef] + vqdmlal.s32 q8, d19, d18 +@ CHECK: vmls.i8 d16, d18, d17 @ encoding: [0xa1,0x09,0x42,0xff] + vmls.i8 d16, d18, d17 +@ CHECK: vmls.i16 d16, d18, d17 @ encoding: [0xa1,0x09,0x52,0xff] + vmls.i16 d16, d18, d17 +@ CHECK: vmls.i32 d16, d18, d17 @ encoding: [0xa1,0x09,0x62,0xff] + vmls.i32 d16, d18, d17 +@ CHECK: vmls.f32 d16, d18, d17 @ encoding: [0xb1,0x0d,0x62,0xef] + vmls.f32 d16, d18, d17 +@ CHECK: vmls.i8 q9, q8, q10 @ encoding: [0xe4,0x29,0x40,0xff] + vmls.i8 q9, q8, q10 +@ CHECK: vmls.i16 q9, q8, q10 @ encoding: [0xe4,0x29,0x50,0xff] + vmls.i16 q9, q8, q10 +@ CHECK: vmls.i32 q9, q8, q10 @ encoding: [0xe4,0x29,0x60,0xff] + vmls.i32 q9, q8, q10 +@ CHECK: vmls.f32 q9, q8, q10 @ encoding: [0xf4,0x2d,0x60,0xef] + vmls.f32 q9, q8, q10 +@ CHECK: vmlsl.s8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xef] + vmlsl.s8 q8, d19, d18 +@ CHECK: vmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xef] + vmlsl.s16 q8, d19, d18 +@ CHECK: vmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xef] + vmlsl.s32 q8, d19, d18 +@ CHECK: vmlsl.u8 q8, d19, d18 @ encoding: [0xa2,0x0a,0xc3,0xff] + vmlsl.u8 q8, d19, d18 +@ CHECK: vmlsl.u16 q8, d19, d18 @ encoding: [0xa2,0x0a,0xd3,0xff] + vmlsl.u16 q8, d19, d18 +@ CHECK: vmlsl.u32 q8, d19, d18 @ encoding: [0xa2,0x0a,0xe3,0xff] + vmlsl.u32 q8, d19, d18 +@ CHECK: vqdmlsl.s16 q8, d19, d18 @ encoding: [0xa2,0x0b,0xd3,0xef] + vqdmlsl.s16 q8, d19, d18 +@ CHECK: vqdmlsl.s32 q8, d19, d18 @ encoding: [0xa2,0x0b,0xe3,0xef] + vqdmlsl.s32 q8, d19, d18 diff --git a/test/MC/ARM/neont2-pairwise-encoding.s b/test/MC/ARM/neont2-pairwise-encoding.s new file mode 100644 index 00000000000..058f1d839eb --- /dev/null +++ b/test/MC/ARM/neont2-pairwise-encoding.s @@ -0,0 +1,89 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vpadd.i8 d16, d17, d16 @ encoding: [0xb0,0x0b,0x41,0xef] + vpadd.i8 d16, d17, d16 +@ CHECK: vpadd.i16 d16, d17, d16 @ encoding: [0xb0,0x0b,0x51,0xef] + vpadd.i16 d16, d17, d16 +@ CHECK: vpadd.i32 d16, d17, d16 @ encoding: [0xb0,0x0b,0x61,0xef] + vpadd.i32 d16, d17, d16 +@ CHECK: vpadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xff] + vpadd.f32 d16, d16, d17 +@ CHECK: vpaddl.s8 d16, d16 @ encoding: [0x20,0x02,0xf0,0xff] + vpaddl.s8 d16, d16 +@ CHECK: vpaddl.s16 d16, d16 @ encoding: [0x20,0x02,0xf4,0xff] + vpaddl.s16 d16, d16 +@ CHECK: vpaddl.s32 d16, d16 @ encoding: [0x20,0x02,0xf8,0xff] + vpaddl.s32 d16, d16 +@ CHECK: vpaddl.u8 d16, d16 @ encoding: [0xa0,0x02,0xf0,0xff] + vpaddl.u8 d16, d16 +@ CHECK: vpaddl.u16 d16, d16 @ encoding: [0xa0,0x02,0xf4,0xff] + vpaddl.u16 d16, d16 +@ CHECK: vpaddl.u32 d16, d16 @ encoding: [0xa0,0x02,0xf8,0xff] + vpaddl.u32 d16, d16 +@ CHECK: vpaddl.s8 q8, q8 @ encoding: [0x60,0x02,0xf0,0xff] + vpaddl.s8 q8, q8 +@ CHECK: vpaddl.s16 q8, q8 @ encoding: [0x60,0x02,0xf4,0xff] + vpaddl.s16 q8, q8 +@ CHECK: vpaddl.s32 q8, q8 @ encoding: [0x60,0x02,0xf8,0xff] + vpaddl.s32 q8, q8 +@ CHECK: vpaddl.u8 q8, q8 @ encoding: [0xe0,0x02,0xf0,0xff] + vpaddl.u8 q8, q8 +@ CHECK: vpaddl.u16 q8, q8 @ encoding: [0xe0,0x02,0xf4,0xff] + vpaddl.u16 q8, q8 +@ CHECK: vpaddl.u32 q8, q8 @ encoding: [0xe0,0x02,0xf8,0xff] + vpaddl.u32 q8, q8 +@ CHECK: vpadal.s8 d16, d17 @ encoding: [0x21,0x06,0xf0,0xff] + vpadal.s8 d16, d17 +@ CHECK: vpadal.s16 d16, d17 @ encoding: [0x21,0x06,0xf4,0xff] + vpadal.s16 d16, d17 +@ CHECK: vpadal.s32 d16, d17 @ encoding: [0x21,0x06,0xf8,0xff] + vpadal.s32 d16, d17 +@ CHECK: vpadal.u8 d16, d17 @ encoding: [0xa1,0x06,0xf0,0xff] + vpadal.u8 d16, d17 +@ CHECK: vpadal.u16 d16, d17 @ encoding: [0xa1,0x06,0xf4,0xff] + vpadal.u16 d16, d17 +@ CHECK: vpadal.u32 d16, d17 @ encoding: [0xa1,0x06,0xf8,0xff] + vpadal.u32 d16, d17 +@ CHECK: vpadal.s8 q9, q8 @ encoding: [0x60,0x26,0xf0,0xff] + vpadal.s8 q9, q8 +@ CHECK: vpadal.s16 q9, q8 @ encoding: [0x60,0x26,0xf4,0xff] + vpadal.s16 q9, q8 +@ CHECK: vpadal.s32 q9, q8 @ encoding: [0x60,0x26,0xf8,0xff] + vpadal.s32 q9, q8 +@ CHECK: vpadal.u8 q9, q8 @ encoding: [0xe0,0x26,0xf0,0xff] + vpadal.u8 q9, q8 +@ CHECK: vpadal.u16 q9, q8 @ encoding: [0xe0,0x26,0xf4,0xff] + vpadal.u16 q9, q8 +@ CHECK: vpadal.u32 q9, q8 @ encoding: [0xe0,0x26,0xf8,0xff] + vpadal.u32 q9, q8 +@ CHECK: vpmin.s8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xef] + vpmin.s8 d16, d16, d17 +@ CHECK: vpmin.s16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xef] + vpmin.s16 d16, d16, d17 +@ CHECK: vpmin.s32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xef] + vpmin.s32 d16, d16, d17 +@ CHECK: vpmin.u8 d16, d16, d17 @ encoding: [0xb1,0x0a,0x40,0xff] + vpmin.u8 d16, d16, d17 +@ CHECK: vpmin.u16 d16, d16, d17 @ encoding: [0xb1,0x0a,0x50,0xff] + vpmin.u16 d16, d16, d17 +@ CHECK: vpmin.u32 d16, d16, d17 @ encoding: [0xb1,0x0a,0x60,0xff] + vpmin.u32 d16, d16, d17 +@ CHECK: vpmin.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x60,0xff] + vpmin.f32 d16, d16, d17 +@ CHECK: vpmax.s8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xef] + vpmax.s8 d16, d16, d17 +@ CHECK: vpmax.s16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xef] + vpmax.s16 d16, d16, d17 +@ CHECK: vpmax.s32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xef] + vpmax.s32 d16, d16, d17 +@ CHECK: vpmax.u8 d16, d16, d17 @ encoding: [0xa1,0x0a,0x40,0xff] + vpmax.u8 d16, d16, d17 +@ CHECK: vpmax.u16 d16, d16, d17 @ encoding: [0xa1,0x0a,0x50,0xff] + vpmax.u16 d16, d16, d17 +@ CHECK: vpmax.u32 d16, d16, d17 @ encoding: [0xa1,0x0a,0x60,0xff] + vpmax.u32 d16, d16, d17 +@ CHECK: vpmax.f32 d16, d16, d17 @ encoding: [0xa1,0x0f,0x40,0xff] + vpmax.f32 d16, d16, d17 diff --git a/test/MC/ARM/neont2-table-encoding.s b/test/MC/ARM/neont2-table-encoding.s new file mode 100644 index 00000000000..3589f2fb3ec --- /dev/null +++ b/test/MC/ARM/neont2-table-encoding.s @@ -0,0 +1,21 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unkown -show-encoding < %s | FileCheck %s +@ XFAIL: * + +.code 16 + +@ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xff] + vtbl.8 d16, {d17}, d16 +@ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xff] + vtbl.8 d16, {d16, d17}, d18 +@ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18}, d20 +@ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xff] + vtbl.8 d16, {d16, d17, d18, d19}, d20 +@ CHECK: vtbx.8 d18, {d16}, d17 @ encoding: [0xe1,0x28,0xf0,0xff] + vtbx.8 d18, {d16}, d17 +@ CHECK: vtbx.8 d19, {d16, d17}, d18 @ encoding: [0xe2,0x39,0xf0,0xff] + vtbx.8 d19, {d16, d17}, d18 +@ CHECK: vtbx.8 d20, {d16, d17, d18}, d21 @ encoding: [0xe5,0x4a,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18}, d21 +@ CHECK: vtbx.8 d20, {d16, d17, d18, d19}, d21 @ encoding: [0xe5,0x4b,0xf0,0xff] + vtbx.8 d20, {d16, d17, d18, d19}, d21