From: Eric Christopher <echristo@gmail.com>
Date: Tue, 14 Oct 2014 01:03:16 +0000 (+0000)
Subject: Remove the TargetMachine from DFAPacketizer since it was only
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=8ff8c16f5830aba065d77c2e82789654c05fe5f0;p=oota-llvm.git

Remove the TargetMachine from DFAPacketizer since it was only
being used to grab subtarget specific things that we can grab
from the MachineFunction anyhow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219650 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/CodeGen/DFAPacketizer.h b/include/llvm/CodeGen/DFAPacketizer.h
index a0826059e09..f9cdc2a469f 100644
--- a/include/llvm/CodeGen/DFAPacketizer.h
+++ b/include/llvm/CodeGen/DFAPacketizer.h
@@ -91,7 +91,6 @@ public:
 // API call is made to prune the dependence.
 class VLIWPacketizerList {
 protected:
-  const TargetMachine &TM;
   const MachineFunction &MF;
   const TargetInstrInfo *TII;
 
diff --git a/lib/CodeGen/DFAPacketizer.cpp b/lib/CodeGen/DFAPacketizer.cpp
index 7bd578ff254..0a188c0935a 100644
--- a/lib/CodeGen/DFAPacketizer.cpp
+++ b/lib/CodeGen/DFAPacketizer.cpp
@@ -126,8 +126,8 @@ void DefaultVLIWScheduler::schedule() {
 // VLIWPacketizerList Ctor
 VLIWPacketizerList::VLIWPacketizerList(MachineFunction &MF,
                                        MachineLoopInfo &MLI, bool IsPostRA)
-    : TM(MF.getTarget()), MF(MF) {
-  TII = TM.getSubtargetImpl()->getInstrInfo();
+    : MF(MF) {
+  TII = MF.getSubtarget().getInstrInfo();
   ResourceTracker = TII->CreateTargetScheduleState(MF.getSubtarget());
   VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, IsPostRA);
 }
diff --git a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index 522c810ba0f..e7296d65078 100644
--- a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -323,7 +323,7 @@ bool HexagonPacketizerList::IsCallDependent(MachineInstr* MI,
 
   const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
   const HexagonRegisterInfo *QRI =
-      (const HexagonRegisterInfo *)TM.getSubtargetImpl()->getRegisterInfo();
+      (const HexagonRegisterInfo *)MF.getSubtarget().getRegisterInfo();
 
   // Check for lr dependence
   if (DepReg == QRI->getRARegister()) {
@@ -548,7 +548,7 @@ bool HexagonPacketizerList::CanPromoteToNewValueStore(
     return false;
 
   const HexagonRegisterInfo *QRI =
-      (const HexagonRegisterInfo *)TM.getSubtargetImpl()->getRegisterInfo();
+      (const HexagonRegisterInfo *)MF.getSubtarget().getRegisterInfo();
   const MCInstrDesc& MCID = PacketMI->getDesc();
   // first operand is always the result
 
@@ -722,7 +722,7 @@ bool HexagonPacketizerList::CanPromoteToNewValue(
 
   const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
   const HexagonRegisterInfo *QRI =
-      (const HexagonRegisterInfo *)TM.getSubtargetImpl()->getRegisterInfo();
+      (const HexagonRegisterInfo *)MF.getSubtarget().getRegisterInfo();
   if (!QRI->Subtarget.hasV4TOps() ||
       !QII->mayBeNewStore(MI))
     return false;
@@ -1004,7 +1004,7 @@ bool HexagonPacketizerList::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) {
 
   const unsigned FrameSize = MF.getFrameInfo()->getStackSize();
   const HexagonRegisterInfo *QRI =
-      (const HexagonRegisterInfo *)TM.getSubtargetImpl()->getRegisterInfo();
+      (const HexagonRegisterInfo *)MF.getSubtarget().getRegisterInfo();
   const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
 
   // Inline asm cannot go in the packet.