From: Wu Liang feng <wulf@rock-chips.com>
Date: Mon, 16 May 2016 10:33:49 +0000 (+0800)
Subject: ARM64: dts: rk3399: quirk for extra long delay for dwc3 xHCI
X-Git-Tag: firefly_0821_release~2639
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=915e5120e3bd20c45839f19435cbe7084f22298d;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399: quirk for extra long delay for dwc3 xHCI

It has been reported that xHCI on this SoC really cannot
sleep without extraordinary delay. This quirk can ensure
the xHCI enter the Halted state after the Run/Stop (R/S)
bit is cleared to '0'.

Change-Id: Ibccf0c5c2da4533817b998b523e3a3a09ed7dcea
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index b52e00ca6caf..a5beae6b822a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -436,6 +436,7 @@
 			snps,phyif_utmi_16_bits;
 			snps,dis_u2_freeclk_exists_quirk;
 			snps,dis_del_phy_power_chg_quirk;
+			snps,xhci_slow_suspend_quirk;
 			status = "disabled";
 		};
 	};
@@ -462,6 +463,7 @@
 			snps,phyif_utmi_16_bits;
 			snps,dis_u2_freeclk_exists_quirk;
 			snps,dis_del_phy_power_chg_quirk;
+			snps,xhci_slow_suspend_quirk;
 			status = "disabled";
 		};
 	};