From: Anton Korobeynikov <asl@math.spbu.ru>
Date: Thu, 16 Jul 2009 14:21:41 +0000 (+0000)
Subject: Implement FP regs spills / restores
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=92ac82abb457354045c0d776e681fa69c589d5e9;p=oota-llvm.git

Implement FP regs spills / restores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76024 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp
index 252a5f670f5..61f6e939e81 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -66,6 +66,10 @@ void SystemZInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
   else if (RC == &SystemZ::GR64RegClass ||
            RC == &SystemZ::ADDR64RegClass) {
     Opc = SystemZ::MOV64mr;
+  } else if (RC == &SystemZ::FP32RegClass) {
+    Opc = SystemZ::FMOV32mr;
+  } else if (RC == &SystemZ::FP64RegClass) {
+    Opc = SystemZ::FMOV64mr;
   } else
     assert(0 && "Unsupported regclass to store");
 
@@ -87,6 +91,10 @@ void SystemZInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
   else if (RC == &SystemZ::GR64RegClass ||
            RC == &SystemZ::ADDR64RegClass) {
     Opc = SystemZ::MOV64rm;
+  } else if (RC == &SystemZ::FP32RegClass) {
+    Opc = SystemZ::FMOV32rm;
+  } else if (RC == &SystemZ::FP64RegClass) {
+    Opc = SystemZ::FMOV64rm;
   } else
     assert(0 && "Unsupported regclass to store");
 
@@ -369,6 +377,12 @@ SystemZInstrInfo::getLongDispOpc(unsigned Opc) const {
   case SystemZ::UCMP32rm:
     Opc = SystemZ::UCMP32rmy;
     break;
+  case SystemZ::FMOV32mr:
+    Opc = SystemZ::FMOV32mry;
+    break;
+  case SystemZ::FMOV64mr:
+    Opc = SystemZ::FMOV64mry;
+    break;
   default:
     break;
   }