From: Shawn Lin <shawn.lin@rock-chips.com>
Date: Fri, 27 May 2016 06:57:25 +0000 (+0800)
Subject: mmc: core: Fix HS switch failure in mmc_select_hs400
X-Git-Tag: firefly_0821_release~2593
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=92e34f1027741f6c319bef8ba968d1c3350d3db9;p=firefly-linux-kernel-4.4.55.git

mmc: core: Fix HS switch failure in mmc_select_hs400

We should change HS400 mode selection timing to meet JEDEC
specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ
after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode
selection:

Set the "Timing Interface" parameter in the HS_TIMING[185] field of the
Extended CSD register to 0x1 to switch to High Speed mode and then set
the clock frequency to a value not greater than 52MHZ.

Change-Id: Ia676b8e3ea4a66867372c9719d768a6d4405ff15
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
---

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 7dfdd7e6c77e..14d923216d4a 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1083,10 +1083,6 @@ static int mmc_select_hs400(struct mmc_card *card)
 	if (host->caps & MMC_CAP_WAIT_WHILE_BUSY)
 		send_status = false;
 
-	/* Reduce frequency to HS frequency */
-	max_dtr = card->ext_csd.hs_max_dtr;
-	mmc_set_clock(host, max_dtr);
-
 	/* Switch card to HS mode */
 	val = EXT_CSD_TIMING_HS;
 	err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@@ -1102,6 +1098,10 @@ static int mmc_select_hs400(struct mmc_card *card)
 	/* Set host controller to HS timing */
 	mmc_set_timing(card->host, MMC_TIMING_MMC_HS);
 
+	/* Reduce frequency to HS frequency */
+	max_dtr = card->ext_csd.hs_max_dtr;
+	mmc_set_clock(host, max_dtr);
+
 	if (!send_status) {
 		err = mmc_switch_status(card);
 		if (err)