From: Abhilash Kesavan Date: Tue, 28 Oct 2014 11:18:55 +0000 (+0530) Subject: clk: samsung: exynos7: add gate clock for ADC block X-Git-Tag: firefly_0821_release~176^2~2601^2~5^2~6 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=932e98224d5602be17ed61d0e057e9326f12b59d;p=firefly-linux-kernel-4.4.55.git clk: samsung: exynos7: add gate clock for ADC block Add clock support for the ADC interface in Exynos7. Signed-off-by: Abhilash Kesavan Signed-off-by: Sylwester Nawrocki --- diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c index 17e5cf4d2248..ea4483b8d62e 100644 --- a/drivers/clk/samsung/clk-exynos7.c +++ b/drivers/clk/samsung/clk-exynos7.c @@ -486,6 +486,8 @@ static struct samsung_gate_clock peric0_gate_clks[] __initdata = { ENABLE_PCLK_PERIC0, 14, 0, 0), GATE(PCLK_UART0, "pclk_uart0", "mout_aclk_peric0_66_user", ENABLE_PCLK_PERIC0, 16, 0, 0), + GATE(PCLK_ADCIF, "pclk_adcif", "mout_aclk_peric0_66_user", + ENABLE_PCLK_PERIC0, 20, 0, 0), GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user", ENABLE_PCLK_PERIC0, 21, 0, 0), diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h index f255bb7c64b3..8e4681b07ae7 100644 --- a/include/dt-bindings/clock/exynos7-clk.h +++ b/include/dt-bindings/clock/exynos7-clk.h @@ -55,7 +55,8 @@ #define PCLK_HSI2C11 9 #define PCLK_PWM 10 #define SCLK_PWM 11 -#define PERIC0_NR_CLK 12 +#define PCLK_ADCIF 12 +#define PERIC0_NR_CLK 13 /* PERIC1 */ #define PCLK_UART1 1