From: 黄涛 Date: Mon, 6 Jan 2014 04:43:08 +0000 (+0800) Subject: pinctrl: rockchip: enable clock support, disable pinmux disable and RK30_PIN_PXX... X-Git-Tag: firefly_0821_release~6418 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=94b975e9b82899afff8de13b867ed0d5166ef017;p=firefly-linux-kernel-4.4.55.git pinctrl: rockchip: enable clock support, disable pinmux disable and RK30_PIN_PXX to GPIO_XX --- diff --git a/arch/arm/boot/dts/rk3188-pinctrl.dtsi b/arch/arm/boot/dts/rk3188-pinctrl.dtsi index 2cd403333fe6..0a0eaf12d6a8 100755 --- a/arch/arm/boot/dts/rk3188-pinctrl.dtsi +++ b/arch/arm/boot/dts/rk3188-pinctrl.dtsi @@ -18,7 +18,7 @@ reg = <0x2000a000 0x100>, <0x20004064 0x8>; interrupts = ; - /*clocks = <&clk_gates8 9>;*/ + clocks = <&clk_gates8 9>; gpio-controller; #gpio-cells = <2>; @@ -31,7 +31,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x2003c000 0x100>; interrupts = ; - /*clocks = <&clk_gates8 10>;*/ + clocks = <&clk_gates8 10>; gpio-controller; #gpio-cells = <2>; @@ -44,7 +44,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x2003e000 0x100>; interrupts = ; - /*clocks = <&clk_gates8 11>;*/ + clocks = <&clk_gates8 11>; gpio-controller; #gpio-cells = <2>; @@ -57,7 +57,7 @@ compatible = "rockchip,gpio-bank"; reg = <0x20080000 0x100>; interrupts = ; - /*clocks = <&clk_gates8 12>;*/ + clocks = <&clk_gates8 12>; gpio-controller; #gpio-cells = <2>; @@ -70,7 +70,6 @@ compatible = "rockchip,gpio-bank"; reg = <0x20082000 0x100>; interrupts = ; - /*clocks = <&clk_gates8 12>;*/ gpio-controller; #gpio-cells = <2>; @@ -418,7 +417,6 @@ }; - gpio3_pwm { pwm0:pwm0 { rockchip,pins = ; @@ -520,7 +518,6 @@ }; }; - gpio3_sdmmc { sd1_clk: sd1-clk { rockchip,pins = ; @@ -574,7 +571,6 @@ }; }; - gps { gps_mag:gps-mag { rockchip,pins = ; @@ -606,7 +602,6 @@ }; - vol_domain { ap0_vcc:ap0-vcc { rockchip,pins = ; @@ -650,7 +645,6 @@ }; - //to add }; }; diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 7ce7a95a6198..f15b23e9ca7f 100755 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -509,6 +509,7 @@ static void rockchip_pmx_disable(struct pinctrl_dev *pctldev, { struct rockchip_pinctrl *info = pinctrl_dev_get_drvdata(pctldev); const unsigned int *pins = info->groups[group].pins; + const struct rockchip_pin_config *data = info->groups[group].data; struct rockchip_pin_bank *bank; int cnt; @@ -517,7 +518,7 @@ static void rockchip_pmx_disable(struct pinctrl_dev *pctldev, for (cnt = 0; cnt < info->groups[group].npins; cnt++) { bank = pin_to_bank(info, pins[cnt]); - rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); + rockchip_set_mux(bank, pins[cnt] - bank->pin_base, FUNC_TO_GPIO(data[cnt].func)); } } @@ -564,7 +565,7 @@ static const struct pinmux_ops rockchip_pmx_ops = { .get_function_name = rockchip_pmx_get_func_name, .get_function_groups = rockchip_pmx_get_groups, .enable = rockchip_pmx_enable, - .disable = rockchip_pmx_disable, + //.disable = rockchip_pmx_disable, .gpio_set_direction = rockchip_pmx_gpio_set_direction, }; @@ -1338,7 +1339,7 @@ static int rockchip_pinctrl_parse_groups(struct device_node *np, pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL); - if (!of_property_read_u32(np, "allwinner,pull", &val)) { + if (!of_property_read_u32(np, "rockchip,pull", &val)) { enum pin_config_param pull = PIN_CONFIG_END; if (val == 1) pull = PIN_CONFIG_BIAS_PULL_UP; @@ -2085,7 +2086,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, struct resource res; if (of_address_to_resource(bank->of_node, 0, &res)) { - dev_err(dev, "cannot find IO resource for bank\n"); + dev_err(dev, "cannot find IO resource for bank %s\n", bank->name); return -ENOENT; } @@ -2102,7 +2103,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, bank->bank_type = RK3188_BANK0; if (of_address_to_resource(bank->of_node, 1, &res)) { - dev_err(dev, "cannot find IO resource for bank\n"); + dev_err(dev, "cannot find IO resource for bank %s\n", bank->name); return -ENOENT; } @@ -2116,10 +2117,12 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, bank->irq = irq_of_parse_and_map(bank->of_node, 0); bank->clk = of_clk_get(bank->of_node, 0); - //if (IS_ERR(bank->clk)) - //return PTR_ERR(bank->clk); + if (IS_ERR(bank->clk)) { + dev_warn(dev, "failed to get clk for bank %s\n", bank->name); + bank->clk = NULL; + } + clk_prepare_enable(bank->clk); return 0; - //return clk_prepare_enable(bank->clk); } static const struct of_device_id rockchip_pinctrl_dt_match[]; diff --git a/include/dt-bindings/pinctrl/rockchip-rk3188.h b/include/dt-bindings/pinctrl/rockchip-rk3188.h index d0e4ba5b7849..f806dbce3c94 100755 --- a/include/dt-bindings/pinctrl/rockchip-rk3188.h +++ b/include/dt-bindings/pinctrl/rockchip-rk3188.h @@ -535,41 +535,39 @@ #define POS_TRI 3 -//#define rk29_mux_api_set(name, mode) iomux_set(mode) -//#define rk30_mux_api_set(name, mode) iomux_set(mode) -//#define rk30_iomux_init() iomux_init() - -#define RK30_PIN_PA0 ( 0) -#define RK30_PIN_PA1 ( 1) -#define RK30_PIN_PA2 ( 2) -#define RK30_PIN_PA3 ( 3) -#define RK30_PIN_PA4 ( 4) -#define RK30_PIN_PA5 ( 5) -#define RK30_PIN_PA6 ( 6) -#define RK30_PIN_PA7 ( 7) -#define RK30_PIN_PB0 ( 8) -#define RK30_PIN_PB1 ( 9) -#define RK30_PIN_PB2 ( 10) -#define RK30_PIN_PB3 ( 11) -#define RK30_PIN_PB4 ( 12) -#define RK30_PIN_PB5 ( 13) -#define RK30_PIN_PB6 ( 14) -#define RK30_PIN_PB7 ( 15) -#define RK30_PIN_PC0 ( 16) -#define RK30_PIN_PC1 ( 17) -#define RK30_PIN_PC2 ( 18) -#define RK30_PIN_PC3 ( 19) -#define RK30_PIN_PC4 ( 20) -#define RK30_PIN_PC5 ( 21) -#define RK30_PIN_PC6 ( 22) -#define RK30_PIN_PC7 ( 23) -#define RK30_PIN_PD0 ( 24) -#define RK30_PIN_PD1 ( 25) -#define RK30_PIN_PD2 ( 26) -#define RK30_PIN_PD3 ( 27) -#define RK30_PIN_PD4 ( 28) -#define RK30_PIN_PD5 ( 29) -#define RK30_PIN_PD6 ( 30) -#define RK30_PIN_PD7 ( 31) +#define GPIO_A0 0 +#define GPIO_A1 1 +#define GPIO_A2 2 +#define GPIO_A3 3 +#define GPIO_A4 4 +#define GPIO_A5 5 +#define GPIO_A6 6 +#define GPIO_A7 7 +#define GPIO_B0 8 +#define GPIO_B1 9 +#define GPIO_B2 10 +#define GPIO_B3 11 +#define GPIO_B4 12 +#define GPIO_B5 13 +#define GPIO_B6 14 +#define GPIO_B7 15 +#define GPIO_C0 16 +#define GPIO_C1 17 +#define GPIO_C2 18 +#define GPIO_C3 19 +#define GPIO_C4 20 +#define GPIO_C5 21 +#define GPIO_C6 22 +#define GPIO_C7 23 +#define GPIO_D0 24 +#define GPIO_D1 25 +#define GPIO_D2 26 +#define GPIO_D3 27 +#define GPIO_D4 28 +#define GPIO_D5 29 +#define GPIO_D6 30 +#define GPIO_D7 31 + +#define FUNC_TO_GPIO(m) ((m) & 0xfff0) #endif