From: Xiubo Li <Li.Xiubo@freescale.com>
Date: Wed, 23 Apr 2014 02:12:00 +0000 (+0800)
Subject: clocksource: Fix clocksource_mmio_readX_down
X-Git-Tag: firefly_0821_release~176^2~3785^2~18^2^2~9
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=95c19a06ec1cf9530ebb8f2c7eeda1d7398b43f1;p=firefly-linux-kernel-4.4.55.git

clocksource: Fix clocksource_mmio_readX_down

For some clocksource devices, for example, the registers are 32-bit, while
the lower 16-bit is used for timer counting(And reading the upper 16-bit
will return 0).

For example, when the counter value is 0x00001111, and then the
~readl_relaxed(to_mmio_clksrc(c)->reg) will return the value of 0xFFFFEEEE,
but it should be 0x0000EEEE.

So just using the c->mask to mask the unused bits.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---

diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c
index 19a6b3f4d9cf..1593ade2a815 100644
--- a/drivers/clocksource/mmio.c
+++ b/drivers/clocksource/mmio.c
@@ -27,7 +27,7 @@ cycle_t clocksource_mmio_readl_up(struct clocksource *c)
 
 cycle_t clocksource_mmio_readl_down(struct clocksource *c)
 {
-	return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg);
+	return ~(cycle_t)readl_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
 }
 
 cycle_t clocksource_mmio_readw_up(struct clocksource *c)
@@ -37,7 +37,7 @@ cycle_t clocksource_mmio_readw_up(struct clocksource *c)
 
 cycle_t clocksource_mmio_readw_down(struct clocksource *c)
 {
-	return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg);
+	return ~(cycle_t)readw_relaxed(to_mmio_clksrc(c)->reg) & c->mask;
 }
 
 /**