From: Mike Frysinger Date: Wed, 28 Mar 2012 03:43:02 +0000 (+0800) Subject: blackfin: fix L1 data A overflow link issue X-Git-Tag: firefly_0821_release~3680^2~3130^2~2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=95fc2d8f96d37995f2bd1ec49f46ee9816ddf5b7;p=firefly-linux-kernel-4.4.55.git blackfin: fix L1 data A overflow link issue This patch fix below compile error: "bfin-uclinux-ld: L1 data A overflow!" It is due to the recent lib/gen_crc32table.c change: 46c5801eaf86e83cb3a4142ad35188db5011fff0 crc32: bolt on crc32c it added 8KiB more data to __cacheline_aligned which cause blackfin L1 data cache overflow. Signed-off-by: Mike Frysinger Signed-off-by: Bob Liu --- diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c1269a1085e1..373a6902d8fa 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -823,7 +823,7 @@ config CACHELINE_ALIGNED_L1 bool "Locate cacheline_aligned data to L1 Data Memory" default y if !BF54x default n if BF54x - depends on !SMP && !BF531 + depends on !SMP && !BF531 && !CRC32 help If enabled, cacheline_aligned data is linked into L1 data memory. (less latency)