From: Joerg Sonnenberger Date: Mon, 4 Aug 2014 15:47:38 +0000 (+0000) Subject: Add features for PPC 4xx and e500/e500mc instructions. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=977b978f936ca9192936ad50a1d03bf100246a4b;p=oota-llvm.git Add features for PPC 4xx and e500/e500mc instructions. Move the test cases for them into separate files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214724 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td index 155f3d5b5c1..87691d014b7 100644 --- a/lib/Target/PowerPC/PPC.td +++ b/lib/Target/PowerPC/PPC.td @@ -88,6 +88,10 @@ def FeatureLDBRX : SubtargetFeature<"ldbrx","HasLDBRX", "true", "Enable the ldbrx instruction">; def FeatureBookE : SubtargetFeature<"booke", "IsBookE", "true", "Enable Book E instructions">; +def FeatureE500 : SubtargetFeature<"E500", "IsE500", "true", + "Enable E500/E500mc instructions">; +def FeaturePPC4xx : SubtargetFeature<"ppc4xx", "IsPPC4xx", "true", + "Enable PPC 4xx instructions">; def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true", "Enable QPX instructions">; def FeatureVSX : SubtargetFeature<"vsx","HasVSX", "true", diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index d00d9d8cc56..f6e3e662b0e 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -629,6 +629,8 @@ def In32BitMode : Predicate<"!PPCSubTarget->isPPC64()">; def In64BitMode : Predicate<"PPCSubTarget->isPPC64()">; def IsBookE : Predicate<"PPCSubTarget->isBookE()">; def IsNotBookE : Predicate<"!PPCSubTarget->isBookE()">; +def IsPPC4xx : Predicate<"PPCSubTarget->isPPC4xx()">; +def IsE500 : Predicate<"PPCSubTarget->isE500()">; //===----------------------------------------------------------------------===// // PowerPC Multiclass Definitions. @@ -3123,13 +3125,15 @@ def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>, def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>, Requires<[IsBookE]>; -def RFDI : XForm_0<19, 39, (outs), (ins), "rfdi", IIC_BrB, []>; -def RFMCI : XForm_0<19, 38, (outs), (ins), "rfmci", IIC_BrB, []>; +def RFDI : XForm_0<19, 39, (outs), (ins), "rfdi", IIC_BrB, []>, + Requires<[IsE500]>; +def RFMCI : XForm_0<19, 38, (outs), (ins), "rfmci", IIC_BrB, []>, + Requires<[IsE500]>; def MFDCR : XFXForm_1<31, 323, (outs gprc:$RT), (ins i32imm:$SPR), - "mfdcr $RT, $SPR", IIC_SprMFSPR>; + "mfdcr $RT, $SPR", IIC_SprMFSPR>, Requires<[IsPPC4xx]>; def MTDCR : XFXForm_1<31, 451, (outs), (ins gprc:$RT, i32imm:$SPR), - "mtdcr $SPR, $RT", IIC_SprMTSPR>; + "mtdcr $SPR, $RT", IIC_SprMTSPR>, Requires<[IsPPC4xx]>; //===----------------------------------------------------------------------===// // PowerPC Assembler Instruction Aliases diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index b39fe10bc13..f8059dacdfd 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -136,6 +136,8 @@ void PPCSubtarget::initializeEnvironment() { HasPOPCNTD = false; HasLDBRX = false; IsBookE = false; + IsPPC4xx = false; + IsE500 = false; DeprecatedMFTB = false; DeprecatedDST = false; HasLazyResolverStubs = false; diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h index 8c4f583bdb8..d5d4ab265ae 100644 --- a/lib/Target/PowerPC/PPCSubtarget.h +++ b/lib/Target/PowerPC/PPCSubtarget.h @@ -97,6 +97,8 @@ protected: bool HasPOPCNTD; bool HasLDBRX; bool IsBookE; + bool IsE500; + bool IsPPC4xx; bool DeprecatedMFTB; bool DeprecatedDST; bool HasLazyResolverStubs; @@ -218,6 +220,8 @@ public: bool hasPOPCNTD() const { return HasPOPCNTD; } bool hasLDBRX() const { return HasLDBRX; } bool isBookE() const { return IsBookE; } + bool isPPC4xx() const { return IsPPC4xx; } + bool isE500() const { return IsE500; } bool isDeprecatedMFTB() const { return DeprecatedMFTB; } bool isDeprecatedDST() const { return DeprecatedDST; } diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt new file mode 100644 index 00000000000..9eca272dbee --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: mfdcr 3, 178 +0x7c 0x72 0x2a 0x86 +# CHECK: mtdcr 178, 3 +0x7c 0x72 0x2b 0x86 diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt new file mode 100644 index 00000000000..ef013d7e8c9 --- /dev/null +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt @@ -0,0 +1,7 @@ +# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s + +# CHECK: rfdi +0x4c 0x00 0x00 0x4e +# CHECK: rfmci +0x4c 0x00 0x00 0x4c + diff --git a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt index 1031ffd09b8..45f4d3e045e 100644 --- a/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt +++ b/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt @@ -2251,11 +2251,6 @@ # CHECK: mtcrf 255, 2 0x7c 0x4f 0xf1 0x20 -# CHECK: rfdi -0x4c 0x00 0x00 0x4e -# CHECK: rfmci -0x4c 0x00 0x00 0x4c - # CHECK: dss 3 0x7c 0x60 0x06 0x6c # CHECK: dssall @@ -2269,10 +2264,5 @@ # CHECK: dststt 12, 11, 3 0x7e 0x6c 0x5a 0xec -# CHECK: mfdcr 3, 178 -0x7c 0x72 0x2a 0x86 -# CHECK: mtdcr 178, 3 -0x7c 0x72 0x2b 0x86 - # CHECK: tlbia 0x7c 0x00 0x02 0xe4 diff --git a/test/MC/PowerPC/ppc64-encoding-4xx.s b/test/MC/PowerPC/ppc64-encoding-4xx.s new file mode 100644 index 00000000000..c53a25193e2 --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-4xx.s @@ -0,0 +1,11 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions specific to the PowerPC 4xx embedded controllers: + +# CHECK-BE: mfdcr 3, 178 # encoding: [0x7c,0x72,0x2a,0x86] +# CHECK-LE: mfdcr 3, 178 # encoding: [0x86,0x2a,0x72,0x7c] + mfdcr 3,178 +# CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86] +# CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c] + mtdcr 178,3 diff --git a/test/MC/PowerPC/ppc64-encoding-e500.s b/test/MC/PowerPC/ppc64-encoding-e500.s new file mode 100644 index 00000000000..fee91ee83e3 --- /dev/null +++ b/test/MC/PowerPC/ppc64-encoding-e500.s @@ -0,0 +1,11 @@ +# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s +# RUN: llvm-mc -triple powerpc64le-unknown-unknown --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s + +# Instructions specific to the e500 / e500mc cores: + +# CHECK-BE: rfdi # encoding: [0x4c,0x00,0x00,0x4e] +# CHECK-LE: rfdi # encoding: [0x4e,0x00,0x00,0x4c] + rfdi +# CHECK-BE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] +# CHECK-LE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] + rfmci diff --git a/test/MC/PowerPC/ppc64-encoding-ext.s b/test/MC/PowerPC/ppc64-encoding-ext.s index 18f09d01a6a..99a698d3a55 100644 --- a/test/MC/PowerPC/ppc64-encoding-ext.s +++ b/test/MC/PowerPC/ppc64-encoding-ext.s @@ -3586,14 +3586,6 @@ # CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] mtsprg3 %r4 -# e500/e500mc instructions: -# CHECK-BE: rfdi # encoding: [0x4c,0x00,0x00,0x4e] -# CHECK-LE: rfdi # encoding: [0x4e,0x00,0x00,0x4c] - rfdi -# CHECK-BE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] -# CHECK-LE: rfmci # encoding: [0x4c,0x00,0x00,0x4c] - rfmci - # Altivec Data Stream instruction: # CHECK-BE: dss 3 # encoding: [0x7c,0x60,0x06,0x6c] # CHECK-LE: dss 3 # encoding: [0x6c,0x06,0x60,0x7c] @@ -3614,14 +3606,6 @@ # CHECK-LE: dststt 12, 11, 3 # encoding: [0xec,0x5a,0x6c,0x7e] dststt %r12, %r11, 3 -# PPC 403 support -# CHECK-BE: mfdcr 3, 178 # encoding: [0x7c,0x72,0x2a,0x86] -# CHECK-LE: mfdcr 3, 178 # encoding: [0x86,0x2a,0x72,0x7c] - mfdcr 3,178 -# CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86] -# CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c] - mtdcr 178,3 - # CHECK-BE: tlbia # encoding: [0x7c,0x00,0x02,0xe4] # CHECK-LE: tlbia # encoding: [0xe4,0x02,0x00,0x7c] tlbia