From: Eric Christopher <echristo@apple.com>
Date: Thu, 19 Aug 2010 15:35:27 +0000 (+0000)
Subject: Silence warning.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=979e0a141487a4cd8538dffbe09eca544acf14c7;p=oota-llvm.git

Silence warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111518 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp
index 211e3197286..6dbf0fc98ba 100644
--- a/lib/Target/ARM/ARMFastISel.cpp
+++ b/lib/Target/ARM/ARMFastISel.cpp
@@ -137,7 +137,7 @@ ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
   
   // Do we optionally set a predicate?  Preds is size > 0 iff the predicate
   // defines CPSR. All other OptionalDefines in ARM are the CCR register.
-  bool CPSR;
+  bool CPSR = false;
   if (DefinesOptionalPredicate(MI, &CPSR)) {
     if (CPSR)
       AddDefaultT1CC(MIB);