From: Daniel Sanders <daniel.sanders@imgtec.com>
Date: Fri, 13 Nov 2015 11:44:00 +0000 (+0000)
Subject: [mips][ias] Replace invalid assembly insn in test since IAS parses inline assembly.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=98e49f9e4be0fd4f1924a9e958243abe536ffe96;p=oota-llvm.git

[mips][ias] Replace invalid assembly insn in test since IAS parses inline assembly.

This is NFC at the moment but will prevent this test from failing when
IAS is the default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253033 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/Mips/inlineasm-assembler-directives.ll b/test/CodeGen/Mips/inlineasm-assembler-directives.ll
index 88ceed4114c..9f6f1ebb285 100644
--- a/test/CodeGen/Mips/inlineasm-assembler-directives.ll
+++ b/test/CodeGen/Mips/inlineasm-assembler-directives.ll
@@ -10,14 +10,14 @@ entry:
 ; CHECK-NEXT: .set  macro
 ; CHECK-NEXT: .set  reorder
 ; CHECK:      addi $9, ${{[2-9][0-9]?}}, 8
-; CHECK:      subi ${{[2-9][0-9]?}}, $9, 6
+; CHECK:      ori ${{[2-9][0-9]?}}, $9, 6
 ; CHECK:      .set  pop
 ; CHECK-NEXT: #NO_APP
   %a = alloca i32, align 4
   %b = alloca i32, align 4
   store i32 20, i32* %a, align 4
   %0 = load i32, i32* %a, align 4
-  %1 = call i32 asm sideeffect "addi $$9, $1, 8\0A\09subi $0, $$9, 6", "=r,r,~{$1}"(i32 %0)
+  %1 = call i32 asm sideeffect "addi $$9, $1, 8\0A\09ori $0, $$9, 6", "=r,r,~{$1}"(i32 %0)
   store i32 %1, i32* %b, align 4
   ret void
 }