From: lw <lw@rock-chips.com>
Date: Tue, 7 Feb 2012 06:53:06 +0000 (+0800)
Subject: add iomux control for i2c bus
X-Git-Tag: firefly_0821_release~9595^2~179^2
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=99a26a62159f955bb193e3ac18c3c4e8500d5df1;p=firefly-linux-kernel-4.4.55.git

add iomux control for i2c bus
---

diff --git a/arch/arm/mach-rk30/include/mach/iomux.h b/arch/arm/mach-rk30/include/mach/iomux.h
index 518a2ba50f49..c12549e6ce7a 100755
--- a/arch/arm/mach-rk30/include/mach/iomux.h
+++ b/arch/arm/mach-rk30/include/mach/iomux.h
@@ -312,8 +312,8 @@
 #define GPIO3A_SDMMC0_WRITE_PRT			1 
 #define GPIO3A_GPIO3A6				0 
 #define GPIO3A_SDMMC0_RSTN_OUT			1 
-#define GPIO4A_GPIO4A5				0 
-#define GPIO4A_I2C4_SCL				1 
+#define GPIO3A_GPIO3A5				0 
+#define GPIO3A_I2C4_SCL				1 
 #define GPIO3A_GPIO3A4				0 
 #define GPIO3A_I2C4_SDA			 	1 
 #define GPIO3A_GPIO3A3				0 
@@ -714,7 +714,7 @@
 //GPIO3A
 #define GPIO3A7_SDMMC0WRITEPRT_NAME			"gpio3a7_sdmmc0writeprt_name" 
 #define GPIO3A6_SDMMC0RSTNOUT_NAME			"gpio3a6_sdmmc0rstnout_name" 
-#define GPIO4A5_I2C4SCL_NAME				"gpio4a5_i2c4scl_name" 
+#define GPIO3A5_I2C4SCL_NAME				"gpio3a5_i2c4scl_name" 
 #define GPIO3A4_I2C4SDA_NAME				"gpio3a4_i2c4sda_name" 
 #define GPIO3A3_I2C3SCL_NAME				"gpio3a3_i2c3scl_name" 
 #define GPIO3A2_I2C3SDA_NAME				"gpio3a2_i2c3sda_name" 
diff --git a/arch/arm/mach-rk30/iomux.c b/arch/arm/mach-rk30/iomux.c
index daa3aafdcf17..9de025f7fe21 100755
--- a/arch/arm/mach-rk30/iomux.c
+++ b/arch/arm/mach-rk30/iomux.c
@@ -152,7 +152,7 @@ MUX_CFG(GPIO2D0_LCDC1DCLK_NAME, 			GPIO2D,   0,	 2,   0,	DEFAULT)
 //GPIO3A
 MUX_CFG(GPIO3A7_SDMMC0WRITEPRT_NAME,			GPIO3A,   14,	 2,   0,	DEFAULT) 
 MUX_CFG(GPIO3A6_SDMMC0RSTNOUT_NAME, 			GPIO3A,   12,	 2,   0,	DEFAULT) 
-MUX_CFG(GPIO4A5_I2C4SCL_NAME,				GPIO3A,   10,	 2,   0,	DEFAULT) 
+MUX_CFG(GPIO3A5_I2C4SCL_NAME,				GPIO3A,   10,	 2,   0,	DEFAULT) 
 MUX_CFG(GPIO3A4_I2C4SDA_NAME,				GPIO3A,   8,	 2,   0,	DEFAULT) 
 MUX_CFG(GPIO3A3_I2C3SCL_NAME,				GPIO3A,   6,	 2,   0,	DEFAULT) 
 MUX_CFG(GPIO3A2_I2C3SDA_NAME,				GPIO3A,   4,	 2,   0,	DEFAULT) 
@@ -306,6 +306,32 @@ int rk30_iomux_init(void)
 	rk30_mux_api_set(GPIO2C4_LCDC1DATA20_SPI1CSN0_HSADCDATA1_NAME, GPIO2C_SPI1_CSN0);
 	rk30_mux_api_set(GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME, GPIO2C_SPI1_CLK);
 #endif
+
+#ifdef CONFIG_I2C0_RK30
+	rk30_mux_api_set(GPIO2D5_I2C0SCL_NAME, GPIO2D_I2C0_SCL);	
+	rk30_mux_api_set(GPIO2D4_I2C0SDA_NAME, GPIO2D_I2C0_SDA);
+#endif
+
+#ifdef CONFIG_I2C1_RK30
+	rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_I2C1_SCL);
+	rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_I2C1_SDA);
+#endif
+
+#ifdef CONFIG_I2C2_RK30
+	rk30_mux_api_set(GPIO3A1_I2C2SCL_NAME, GPIO3A_I2C2_SCL);
+	rk30_mux_api_set(GPIO3A0_I2C2SDA_NAME, GPIO3A_I2C2_SDA);
+#endif
+
+#ifdef CONFIG_I2C3_RK30
+	rk30_mux_api_set(GPIO3A3_I2C3SCL_NAME, GPIO3A_I2C3_SCL);
+	rk30_mux_api_set(GPIO3A2_I2C3SDA_NAME, GPIO3A_I2C2_SDA);
+#endif
+
+#ifdef CONFIG_I2C4_RK30
+	rk30_mux_api_set(GPIO3A5_I2C4SCL_NAME, GPIO3A_I2C3_SCL);
+	rk30_mux_api_set(GPIO3A4_I2C4SDA_NAME, GPIO3A_I2C2_SDA);
+#endif
+
 #ifdef CONFIG_RK30_VMAC
 	rk30_mux_api_set(GPIO1C0_CIF1DATA2_RMIICLKOUT_RMIICLKIN_NAME, GPIO1C_RMII_CLKOUT);
 	rk30_mux_api_set(GPIO1C1_CIFDATA3_RMIITXEN_NAME, GPIO1C_RMII_TX_EN);