From: Elaine Zhang Date: Fri, 10 Feb 2017 02:29:46 +0000 (+0800) Subject: rockchip: clk: rk3399: remove the flag ROCKCHIP_PLL_SYNC_RATE for VPLL and CPLL X-Git-Tag: firefly_0821_release~664 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9b19ce5d88345dcecb14e4fe587fa86becb9b4e4;p=firefly-linux-kernel-4.4.55.git rockchip: clk: rk3399: remove the flag ROCKCHIP_PLL_SYNC_RATE for VPLL and CPLL to slove the display shaking, when uboot logo display to kernel show. Change-Id: I804aa09f24bc4fa7b6314a7a5487f0ee1a321724 Signed-off-by: Elaine Zhang --- diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index cd334bcce5a5..e8831e4e8c07 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -307,14 +307,19 @@ static struct rockchip_pll_clock rk3399_pll_clks[] __initdata = { RK3399_PLL_CON(11), 8, 31, 0, rk3399_pll_rates), [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RK3399_PLL_CON(16), RK3399_PLL_CON(19), 8, 31, 0, NULL), +#ifdef RK3399_TWO_PLL_FOR_VOP + [cpll] = PLL(pll_rk3399, PLL_CPLL, "cpll", mux_pll_p, 0, RK3399_PLL_CON(24), + RK3399_PLL_CON(27), 8, 31, 0, rk3399_pll_rates), +#else [cpll] = PLL(pll_rk3399, PLL_CPLL, "cpll", mux_pll_p, 0, RK3399_PLL_CON(24), RK3399_PLL_CON(27), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates), +#endif [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RK3399_PLL_CON(32), RK3399_PLL_CON(35), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates), [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40), RK3399_PLL_CON(43), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates), [vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll", mux_pll_p, 0, RK3399_PLL_CON(48), - RK3399_PLL_CON(51), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_vpll_rates), + RK3399_PLL_CON(51), 8, 31, 0, rk3399_vpll_rates), }; static struct rockchip_pll_clock rk3399_pmu_pll_clks[] __initdata = {