From: Stefan Hauser Date: Fri, 1 Jul 2016 20:35:03 +0000 (+0200) Subject: UPSTREAM: net: phy: dp83867: Fix initialization of PHYCR register X-Git-Tag: release-20171130_firefly~4^2~507 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9b43f71655d0a67a4e8655c17f4b582620070b75;p=firefly-linux-kernel-4.4.55.git UPSTREAM: net: phy: dp83867: Fix initialization of PHYCR register When initializing the PHY control register, the FIFO depth bits are written without reading the previous register value, i.e. all other bits are overwritten with zero. This disables automatic MDI-X configuration, which is enabled by default. Fix initialization by doing a read/modify/write operation. Signed-off-by: Stefan Hauser Reviewed-by: Florian Fainelli Signed-off-by: David S. Miller (cherry picked from commit b291c418172f2cfbe009d81cd9a92f7a2de7c579) Change-Id: If14021286ff6e8b770f6cfe0f4026e29414e75d8 Signed-off-by: Jacob Chen --- diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index e4c0b0c0af02..b099c7cabb96 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -57,6 +57,7 @@ /* PHY CTRL bits */ #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 +#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14) /* RGMIIDCTL bits */ #define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 @@ -133,8 +134,8 @@ static int dp83867_of_init(struct phy_device *phydev) static int dp83867_config_init(struct phy_device *phydev) { struct dp83867_private *dp83867; - int ret; - u16 val, delay; + int ret, val; + u16 delay; if (!phydev->priv) { dp83867 = devm_kzalloc(&phydev->dev, sizeof(*dp83867), @@ -151,8 +152,12 @@ static int dp83867_config_init(struct phy_device *phydev) } if (phy_interface_is_rgmii(phydev)) { - ret = phy_write(phydev, MII_DP83867_PHYCTRL, - (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); + val = phy_read(phydev, MII_DP83867_PHYCTRL); + if (val < 0) + return val; + val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK; + val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); + ret = phy_write(phydev, MII_DP83867_PHYCTRL, val); if (ret) return ret; }