From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Fri, 13 Mar 2009 18:37:06 +0000 (+0000)
Subject: Improve sext and zext of TLS variables.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9b922aa3b8c781ef9ecb3c82e8ea7d7874e65861;p=oota-llvm.git

Improve sext and zext of TLS variables.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66922 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 64d002171a4..19703e9ce97 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2946,6 +2946,24 @@ def TLS_ext16_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
                               (X86Wrapper tglobaltlsaddr:$src))))]>,
                         SegGS;
 
+let AddedComplexity = 15 in
+def TLS_sext16_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
+                         "movswl\t%gs:${src:mem}, $dst",
+                         [(set GR32:$dst,
+                           (sextloadi32i16
+                             (add X86TLStp,
+                               (X86Wrapper tglobaltlsaddr:$src))))]>,
+                         SegGS;
+
+let AddedComplexity = 15 in
+def TLS_zext16_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
+                         "movzwl\t%gs:${src:mem}, $dst",
+                         [(set GR32:$dst,
+                           (zextloadi32i16
+                             (add X86TLStp,
+                               (X86Wrapper tglobaltlsaddr:$src))))]>,
+                         SegGS;
+
 let AddedComplexity = 15 in
 def TLS_ext8_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
                         "movzbl\t%gs:${src:mem}, $dst",
@@ -2955,6 +2973,24 @@ def TLS_ext8_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
                               (X86Wrapper tglobaltlsaddr:$src))))]>,
                         SegGS;
 
+let AddedComplexity = 15 in
+def TLS_sext8_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
+                         "movsbl\t%gs:${src:mem}, $dst",
+                         [(set GR32:$dst,
+                           (sextloadi32i8
+                             (add X86TLStp,
+                               (X86Wrapper tglobaltlsaddr:$src))))]>,
+                         SegGS;
+
+let AddedComplexity = 15 in
+def TLS_zext8_gs_ri : I<0x8B, Pseudo, (outs GR32:$dst), (ins i32imm:$src),
+                         "movzbl\t%gs:${src:mem}, $dst",
+                         [(set GR32:$dst,
+                           (zextloadi32i8
+                             (add X86TLStp,
+                              (X86Wrapper tglobaltlsaddr:$src))))]>,
+                         SegGS;
+
 def TLS_tp : I<0x8B, Pseudo, (outs GR32:$dst), (ins),
                "movl\t%gs:0, $dst",
                [(set GR32:$dst, X86TLStp)]>, SegGS;
diff --git a/test/CodeGen/X86/tls13.ll b/test/CodeGen/X86/tls13.ll
new file mode 100644
index 00000000000..30894439855
--- /dev/null
+++ b/test/CodeGen/X86/tls13.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movswl	%gs:i@NTPOFF, %eax} %t
+; RUN: grep {movzwl	%gs:j@NTPOFF, %eax} %t
+
+@i = thread_local global i16 0
+@j = thread_local global i16 0
+
+define void @f() nounwind optsize {
+entry:
+        %0 = load i16* @i, align 2
+        %1 = sext i16 %0 to i32
+        tail call void @g(i32 %1) nounwind
+        %2 = load i16* @j, align 2
+        %3 = zext i16 %2 to i32
+        tail call void @h(i32 %3) nounwind
+        ret void
+}
+
+declare void @g(i32)
+
+declare void @h(i32)
diff --git a/test/CodeGen/X86/tls14.ll b/test/CodeGen/X86/tls14.ll
new file mode 100644
index 00000000000..d3401b65537
--- /dev/null
+++ b/test/CodeGen/X86/tls14.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
+; RUN: grep {movsbl	%gs:i@NTPOFF, %eax} %t
+; RUN: grep {movzbl	%gs:j@NTPOFF, %eax} %t
+
+@i = thread_local global i8 0
+@j = thread_local global i8 0
+
+define void @f() nounwind optsize {
+entry:
+        %0 = load i8* @i, align 2
+        %1 = sext i8 %0 to i32
+        tail call void @g(i32 %1) nounwind
+        %2 = load i8* @j, align 2
+        %3 = zext i8 %2 to i32
+        tail call void @h(i32 %3) nounwind
+        ret void
+}
+
+declare void @g(i32)
+
+declare void @h(i32)