From: Yoshihiro Shimoda Date: Mon, 6 Apr 2009 11:37:15 +0000 (+0000) Subject: sh: sh7785lcr: fix PCI address map for 32-bit mode X-Git-Tag: firefly_0821_release~14462^2~12 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9bb019f4c25a426deab26c9d1c67c8914bb4424f;p=firefly-linux-kernel-4.4.55.git sh: sh7785lcr: fix PCI address map for 32-bit mode Fix the problem that cannot work PCI device on 32-bit mode because influence of the commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map whole PCI address space."). So this patch was implement like a 29-bit mode, map whole physical address space of DDR-SDRAM. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c index e8b7446a7c2b..fb0869f0bef8 100644 --- a/arch/sh/drivers/pci/ops-sh7785lcr.c +++ b/arch/sh/drivers/pci/ops-sh7785lcr.c @@ -48,8 +48,13 @@ EXPORT_SYMBOL(board_pci_channels); static struct sh4_pci_address_map sh7785_pci_map = { .window0 = { +#if defined(CONFIG_32BIT) + .base = SH7780_32BIT_DDR_BASE_ADDR, + .size = 0x40000000, +#else .base = SH7780_CS0_BASE_ADDR, .size = 0x20000000, +#endif }, .flags = SH4_PCIC_NO_RESET, diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h index 97b2c98f05c4..93adc7119b79 100644 --- a/arch/sh/drivers/pci/pci-sh7780.h +++ b/arch/sh/drivers/pci/pci-sh7780.h @@ -104,6 +104,8 @@ #define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE) #define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE) +#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000 + struct sh4_pci_address_map; /* arch/sh/drivers/pci/pci-sh7780.c */